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參數(shù)資料
| 型號： | STM32F102RBT6TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-64 |
| 文件頁數(shù)： | 54/69頁 |
| 文件大?。?/td> | 805K |
| 代理商： | STM32F102RBT6TR |
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Electrical characteristics
STM32F102x8, STM32F102xB
Equation 1: RAIN max formula:
The formula above (Equation 1) is used to determine the maximum external impedance allowed for an
error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
tlat
Injection trigger conversion
latency
fADC = 12 MHz
0.214
s
3(3)
1/fADC
tlatr
Regular trigger conversion
latency
fADC = 12 MHz
0.143
s
2(3)
1/fADC
tS
Sampling time
fADC = 12 MHz
0.107
17.1
s
1.5
239.5
1/fADC
tSTAB
Power-up time
0
1
s
tCONV
Total conversion time
(including sampling time)
fADC = 12 MHz
1.2
18
s
14 to 252 (tS for sampling +12.5
for successive approximation)
1/fADC
1.
Guaranteed by design, not tested in production.
2.
in the LQFP48 package, VREF+ is internally connected to VDDA and VREF- is internally connected to VSSA,
3.
Table 45.
RAIN max for fADC = 12 MHz
(1)
1.
Data guaranteed by design, not tested in production.
Ts (cycles)
tS (s)
RAIN max (kΩ)
1.5
0.13
1.6
7.5
12
13.5
1.13
22
28.52.3848
41.5
3.46
70
55.5
4.63
95
71.55.96122
239.5
19.96
410
Table 44.
ADC characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
R
AIN
T
S
f
ADC
C
ADC
2
N2
+
()
ln
×
----------------------------------------------------------------
R
ADC
–
<
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