參數(shù)資料
型號: STM32F102RBT6TR
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-64
文件頁數(shù): 42/69頁
文件大?。?/td> 805K
代理商: STM32F102RBT6TR
STM32F102x8, STM32F102xB
Electrical characteristics
5.3.12
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 33 are derived from tests
performed under the conditions summarized in Table 8. All I/Os are CMOS and TTL
compliant.
All I/Os are CMOS and TTL compliant (no software configuration required), their
characteristics consider the most strict CMOS-technology or TTL parameters:
For VIH:
–if VDD is in the [2.00 V - 3.08 V] range: CMOS characteristics but TTL included
–if VDD is in the [3.08 V - 3.60 V] range: TTL characteristics but CMOS included
For VIL:
–if VDD is in the [2.00 V - 2.28 V] range: TTL characteristics but CMOS included
–if VDD is in the [2.28 V - 3.60 V] range: CMOS characteristics but TTL included
Table 33.
I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
TTL ports
–0.5
0.8
V
VIH
Standard IO input high level
voltage
2VDD+0.5
IO FT(1) input high level voltage
1.
FT = Five-volt tolerant.
25.5V
VIL
Input low level voltage
CMOS ports
–0.5
0.35 VDD
V
VIH
Input high level voltage
0.65 VDD
VDD+0.5
Vhys
Standard IO Schmitt trigger
voltage hysteresis(2)
2.
Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested
in production.
200
mV
IO FT Schmitt trigger voltage
hysteresis(2)
5% VDD
mV
Ilkg
Input leakage current (3)
3.
With a minimum of 100 mV.
VSS VIN VDD
Standard I/Os
±1
A
VIN = 5 V
I/O FT
3
RPU
Weak pull-up equivalent
resistor(4)
4.
Leakage could be higher than max. if negative current is injected on adjacent pins.
VIN = VSS
30
40
50
k
Ω
RPD
Weak pull-down equivalent
resistor(5)
5.
Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimum (~10% order)
.
VIN = VDD
30
40
50
k
Ω
CIO
I/O pin capacitance
5
pF
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