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參數(shù)資料
| 型號： | ST6382B1/XXX |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PDIP42 |
| 封裝： | PLASTIC, SDIP-42 |
| 文件頁數(shù)： | 17/82頁 |
| 文件大?。?/td> | 1651K |
| 代理商： | ST6382B1/XXX |
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Obsolete
Product(s)
- Obsolete
Product(s)
24/82
ST6388, ST63E88, ST63T88
3.5 INTERRUPT
The ST638x Core can manage 4 different maska-
ble interrupt sources, plus one non-maskable in-
terrupt source (top priority level interrupt). Each
source is associated with a particular interrupt vec-
tor that contains a Jump instruction to the related
interrupt service routine. Each vector is located in
the Program Space at a particular address (see
Table 7). When a source provides an interrupt re-
quest, and the request processing is also enabled
by the ST638x Core, then the PC register is load-
ed with the address of the interrupt vector (i.e. of
the Jump instruction). Finally, the PC is loaded
with the address of the Jump instruction and the
interrupt routine is processed.
The relationship between vector and source and
the associated priority is hardware fixed for the dif-
ferent ST638x devices. For some interrupt sourc-
es it is also possible to select by software the kind
of event that will generate the interrupt.
All interrupts can be disabled by writing to the GEN
bit (global interrupt enable) of the interrupt option
register (address C8h). After a reset, ST638x is in
non maskable interrupt mode, so no interrupts will
be accepted and NMI flags will be used, until a
RETI instruction is executed. If an interrupt is exe-
cuted, one special cycle is made by the core, dur-
ing that the PC is set to the related interrupt vector
address. A jump instruction at this address has to
redirect program execution to the beginning of the
related interrupt routine. The interrupt detecting
cycle, also resets the related interrupt flag (not
available to the user), so that another interrupt can
be stored for this current vector, while its driver is
under execution.
If additional interrupts arrive from the same
source, they will be lost. NMI can interrupt other in-
terrupt routines at any time, while other interrupts
cannot interrupt each other. If more than one inter-
rupt is waiting for service, they are executed ac-
cording to their priority. The lower the number, the
higher the priority. Priority is, therefore, fixed. In-
terrupts are checked during the last cycle of an in-
struction (RETI included). Level sensitive inter-
rupts have to be valid during this period.
3.5.1 Interrupt Vectors/Sources
The ST638x Core includes 5 different interrupt
vectors in order to branch to 5 different interrupt
routines. The interrupt vectors are located in the
fixed (or static) page of the Program Space.
The interrupt vector associated with the non-
maskable interrupt source is named interrupt vec-
tor #0. It is located at the (FFCh,FFDh) addresses
in the Program Space. This vector is associated
with the PC6/IRIN pin.
The interrupt vectors located at addresses (FF6h,
FF7h), (FF4h, FF5h), (FF2h, FF3h), (FF0h, FF1h)
are named interrupt vectors #1, #2, #3 and #4 re-
spectively. These vectors are associated with TIM-
ER
2
(#1),
VSYNC
(#2),
TIMER
1
(#3),
PC4(PWRIN) (#4) and ADC (#4).
Table 7. Interrupt Vectors/Sources
Relationships
Note 1. This pin is associated with the NMI Inter-
rupt Vector
3.5.2 Interrupt Priority
The non-maskable interrupt request has the high-
est priority and can interrupt any other interrupt
routines at any time, nevertheless the other inter-
rupts cannot interrupt each other. If more than one
interrupt request is pending, they are processed
by the ST638x Core according to their priority lev-
el: vector #1 has the higher priority while vector #4
the lower. The priority of each interrupt source is
hardware fixed.
Interrupt Source
Associated
Vector
Address
PC6/IRIN Pin
1
Interrupt
Vector # 0 (NMI)
0FFCh-0FFDh
Timer 2
Interrupt
Vector # 1
0FF6h-0FF7h
Vsync
Interrupt
Vector #2
0FF4h-0FF5h
Timer 1
Interrupt
Vector #3
0FF2h-0FF3h
PC4/PWRIN, ADC
Interrupt
Vector #4
0FF0h-0FF1h
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST6386B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6388B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6387B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6394B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| ST6399B1 | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST6382B4 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6383 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6383B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6383B4 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
| ST6385 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCUs WITH ON-SCREEN-DISPLAY FOR TV TUNING |
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