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參數(shù)資料
| 型號： | ST16C452IJ68 |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | DUAL UART WITH PARALLEL PRINTER PORT |
| 中文描述： | 2 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 16/30頁 |
| 文件大?。?/td> | 162K |
| 代理商： | ST16C452IJ68 |
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16
ST16C452/452PS
Rev. 3.20
ISR BIT-0:
Logic 0 = An interrupt is pending and the ISR contents
may be used as a pointer to the appropriate interrupt
service routine.
Logic 1 = No interrupt pending. (normal default condi-
tion)
ISR BIT 1-3: (logic 0 or cleared s the default condition)
These bits indicate the source for a pending interrupt
at interrupt priority levels 1, 2, and 3 (See Interrupt
Source Table).
ISR BIT 4-7: (logic 0 or cleared s the default condition)
Not Used - initialized to a logic 0.
Line Control Register (LCR)
The Line Control Register is used to specify the
asynchronous data communication format. The word
length, the number of stop bits, and the parity are
selected by writing the appropriate bits in this register.
LCR BIT 0-1: (logic 0 or cleared is the default condi-
tion)
These two bits specify the word length to be transmit-
ted or received.
BIT-1
BIT-0
Word length
0
0
1
1
0
1
0
1
5
6
7
8
LCR BIT-2: (logic 0 or cleared is the default condition)
The length of stop bit is specified by this bit in
conjunction with the programmed word length.
BIT-2
Word length
Stop bit
length
(Bit time(s))
0
1
1
5,6,7,8
5
6,7,8
1
1-1/2
2
LCR BIT-3:
Parity or no parity can be selected via this bit.
Logic 0 = No parity. (normal default condition)
Logic 1 = A parity bit is generated during the transmis-
sion, receiver checks the data and parity for transmis-
sion errors.
LCR BIT-4:
If the parity bit is enabled with LCR bit-3 set to a logic
1, LCR BIT-4 selects the even or odd parity format.
Logic 0 = ODD Parity is generated by forcing an odd
number of logic 1’s in the transmitted data. The
receiver must be programmed to check the same
format. (normal default condition)
Logic 1 = EVEN Parity
is generated by forcing an even
the number of logic 1’s in the transmitted. The receiver
must be programmed to check the same format.
LCR BIT-5:
If the parity bit is enabled, LCR BIT-5 selects the
forced parity format.
LCR BIT-5 = logic 0, parity is not forced. (normal
default condition)
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit
is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit
is forced to a logical 0 for the transmit and receive
data.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST16C452IJ68PS | DUAL UART WITH PARALLEL PRINTER PORT |
| ST16C452CJ68 | Power Supply IC; Number of Outputs:1; Supply Voltage Max:5.5V; Package/Case:10-MSOP; Leaded Process Compatible:No; Output Current:150mA; Output Voltage Max:1.3V; Peak Reflow Compatible (260 C):No; Power Dissipation:481mW |
| ST16C452CJ68PS | Power Supply IC; Number of Outputs:1; Supply Voltage Max:5.5V; Package/Case:10-MSOP; Leaded Process Compatible:No; Output Current:150mA; Output Voltage Max:1.3V; Peak Reflow Compatible (260 C):No; Power Dissipation:481mW |
| ST16C452PS | Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶并行打印機(jī)端口）) |
| ST16C452 | Dual UART with Parallel Printer Port(雙通用異步接收器/發(fā)送器（帶并行打印機(jī)端口）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C452IJ68-F | 功能描述:UART 接口集成電路 DUAL UART W/PARALEL PRINTER PORT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C452IJ68PS | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH PARALLEL PRINTER PORT |
| ST16C452IJ68PS-F | 功能描述:UART 接口集成電路 DUAL UART W/PARALEL PRINTER PORT RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C452IJ68TR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 3.3V/5V 68-Pin PLCC T/R 制造商:Exar Corporation 功能描述:ST16C452IJ68TR-F |
| ST16C452PS | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH PARALLEL PRINTER PORT |
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