參數(shù)資料
型號(hào): SN74ABT8646DWR
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 總線收發(fā)器
英文描述: ABT SERIES, 8-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PDSO28
封裝: GREEN, PLASTIC, SOIC-28
文件頁(yè)數(shù): 3/32頁(yè)
文件大小: 529K
代理商: SN74ABT8646DWR
SN54ABT8646, SN74ABT8646
SCAN TEST DEVICES WITH
OCTAL BUS TRANSCEIVERS AND REGISTERS
SCBS123F AUGUST 1992 REVISED APRIL 2004
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
boundary-control register
The boundary-control register (BCR) is 11 bits long. The BCR is used in the context of the RUNT instruction to
implement additional test operations not included in the basic SCOPE
instruction set. Such operations include
PRPG, PSA with input masking, and binary count up (COUNT). Table 4 shows the test operations that are
decoded by the BCR.
During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is
reset to the binary value 00000000010, which selects the PSA test operation with no input masking.
The BCR order of scan is from TDI through bits 100 to TDO. Table 2 shows the BCR bits and their associated
test control signals.
Table 2. Boundary-Control Register Configuration
BCR BIT
NUMBER
TEST
CONTROL
SIGNAL
BCR BIT
NUMBER
TEST
CONTROL
SIGNAL
BCR BIT
NUMBER
TEST
CONTROL
SIGNAL
10
MASK8
6
MASK4
2
OPCODE2
9
MASK7
5
MASK3
1
OPCODE1
8
MASK6
4
MASK2
0
OPCODE0
7
MASK5
3
MASK1
bypass register
The bypass register is a 1-bit scan path that can be selected to shorten the length of the system scan path,
thereby reducing the number of bits per test pattern that must be applied to complete a test operation. During
Capture-DR, the bypass register captures a logic 0. The bypass register order of scan is shown in Figure 4.
Bit 0
TDO
TDI
Figure 4. Bypass Register Order of Scan
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