參數(shù)資料
型號： SMJ320C31KGDM40B
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 32-BIT, 40 MHz, OTHER DSP, UUC132
封裝： DIE
文件頁數(shù)： 8/59頁
文件大小： 1236K
代理商： SMJ320C31KGDM40B
SMJ320C31, SMJ320LC31, SMQ320LC31
DIGITAL SIGNAL PROCESSORS
SGUS026G APRIL 1998 REVISED SEPTEMBER 2006
16
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
PARAMETER MEASUREMENT INFORMATION
Tester Pin
Electronics
VLoad
IOL
CT
IOH
Output
Under
Test
Where:
IOL
= 2 mA (all outputs)
IOH
= 300
A (all outputs)
VLOAD = 2.15 V
CT
= 80-pF typical load-circuit capacitance
Figure 7. SMJ320LC31 Test Load Circuit
signal transition levels for ’LC31 (see Figure 8 and Figure 9)
Outputs are driven to a minimum logic-high level of 2 V and to a maximum logic-low level of 0.4 V. Output
transition times are specified as follows:
D For a high-to-low transition on an output signal, the level at which the output is said to be no longer high
is 2 V and the level at which the output is said to be low is 1 V.
D For a low-to-high transition, the level at which the output is said to be no longer low is 1 V and the level at
which the output is said to be high is 2 V.
0.4 V
0.6 V
2 V
1.8 V
Figure 8. ’LC31 Output Levels
Transition times for inputs are specified as follows:
D For a high-to-low transition on an input signal, the level at which the input is said to be no longer high is
1.8 V and the level at which the input is said to be low is 0.6 V.
D For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is
0.6 V and the level at which the input is said to be high is 1.8 V.
0.6 V
1.8 V
Figure 9. ’LC31 Input Levels
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