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參數(shù)資料
| 型號： | SMJ320C30KGDB |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | FLOATING-POINT DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE |
| 中文描述： | 浮點數(shù)字信號處理器已知好芯片 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 116K |
| 代理商： | SMJ320C30KGDB |
SMJ320C30KGDB
FLOATING-POINT DIGITAL SIGNAL PROCESSOR
KNOWN GOOD DIE
SGUS019B – NOVEMBER 1995 – REVISED DECEMBER 1998
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Military Operating Temperature Range
–55
°
C to 125
°
C, QML Processing
Fast Instruction Cycle Time of 50 ns and
40 ns
Two 1K-Word
×
32-Bit Single-Cycle
Dual-Access On-Chip RAM Blocks
32-Bit Instruction and Data Words,
24-Bit Addresses
Integer, Floating-Point, and Logical
Operations
40- or 32-Bit Floating-Point/Integer
Multiplier and Arithmetic Logic Unit (ALU)
24
×
24-Bit Integer Multiplier, 32-Bit Product
32
×
32-Bit Floating-Point Multiplier,
40-Bit Product
Parallel ALU and Multiplier Execution in a
Single Cycle
32-Bit Barrel Shifter
Eight Extended-Precision Registers
(Accumulators)
Circular and Bit-Reversed Addressing
Capabilities
Two Independent Bidirectional Serial Ports
With Support for 8-, 16-, 24-, or 32-Bit
Transfers
Two 32-Bit Timers With Control and
Counter Registers
Validated Ada Compiler
64-Word
×
32-Bit Instruction Cache
On-Chip Direct Memory Access (DMA)
Controller for Concurrent I/O and CPU
Operation
One 4K
×
32-Bit Single-Cycle Dual-Access
On-Chip ROM Block
Two 32-Bit External Ports (24- and 13-Bit
Addresses)
Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary
Register Arithmetic Units (ARAUs)
Zero-Overhead Loops With Single-Cycle
Branches
Interlocked Instructions for
Multiprocessing Support
Two- and Three-Operand Instructions
Conditional Calls and Returns
Block-Repeat Capability
Fabricated Using 0.72-
μ
m Enhanced
Performance Implanted CMOS (EPIC
)
Technology by Texas Instruments
description
The SMJ320C30KGDB digital signal processor (DSP) is a high-performance, 32-bit floating-point processor
manufactured in 0.72-
μ
m, double-level metal CMOS technology.
The SMJ320C30KGDB internal busing and special digital-signal-processing instruction set have the speed and
flexibility to execute up to 50 million floating-point operations per second (MFLOPS). The SMJ320C30KGDB
optimizes speed by implementing functions in hardware that other processors implement through software or
microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.
The SMJ320C30KGDB can perform parallel multiply and ALU operations on integer or floating-point data in a
single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated
ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short
machine-cycle time. High performance and ease of use are results of these features.
The large address space, multiprocessor interface, internally and externally generated wait states, two external
interface ports, two timers, two serial ports, and multiple interrupt structure enhanced general-purpose
applications. The SMJ320C30KGDB supports a wide variety of system applications from host processor to
dedicated coprocessor.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1998, Texas Instruments Incorporated
EPIC is a trademark of Texas Instruments Incorporated.
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