參數(shù)資料
型號: SI5374B-A-GL
廠商: SILICON LABORATORIES
元件分類: 時鐘產(chǎn)生/分配
英文描述: 808 MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA80
封裝: 10 X 10 MM, ROHS COMPLIANT, PLASTIC, MO-192, BGA-80
文件頁數(shù): 64/64頁
文件大?。?/td> 303K
代理商: SI5374B-A-GL
Si5374
Preliminary Rev. 0.4
9
Output Rise/Fall
(20–80%) @
212.5 MHz output
CKOTRF
CMOS Output
VDD =2.97
CLOAD =5 pF
——
2
ns
Output Duty Cycle
Uncertainty @
622.08 MHz
CKODC
100
Load
Line-to-Line
Measured at 50% Point
(differential)
——
±40
ps
LVCMOS Input Pins
Minimum Reset Pulse
Width
tRSTMN
1—
s
Reset to Microproces-
sor Access Ready
tREADY
——
10
ms
Input Capacitance
Cin
——
3
pF
LVCMOS Output Pins
Rise/Fall Times
tRF
CLOAD = 20pf
—25
ns
LOSn Trigger Window
LOSTRIG
From last CKINn
to
Internal detection of LOSn
N3 ≠ 1
4.5 x N3
TCKIN
Time to Clear LOL
after LOS Cleared
tCLRLOL
LOS to LOL
Fold = Fnew
Stable OSC_P, OSC_N
reference
—10
ms
Device Skew*
Output Clock Skew
tSKEW
of CKOUTn to of
CKOUT_m, CKOUTn
and CKOUT_m at same
frequency and signal
format
PHASEOFFSET = 0
CKOUT_ALWAYS_ON = 1
SQ_ICAL = 1
——
100
ps
Phase Change due to
Temperature Variation
tTEMP
Max phase changes from
–40 to +85 °C
—300
500
ps
Table 3. AC Characteristics (Continued)
(VDD = 1.8 ± 5%, 2.5 ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
*Note:
Input to output skew after an ICAL is not controlled and can be any value.
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