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參數(shù)資料
| 型號： | SI5374B-A-GL |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 808 MHz, PROC SPECIFIC CLOCK GENERATOR, PBGA80 |
| 封裝： | 10 X 10 MM, ROHS COMPLIANT, PLASTIC, MO-192, BGA-80 |
| 文件頁數(shù)： | 50/64頁 |
| 文件大小： | 303K |
| 代理商： | SI5374B-A-GL |
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Si5374
54
Preliminary Rev. 0.4
Table 9. Si5374 Pin Descriptions
Pin #
Pin Name
I/O
Signal
Level
Description
D4
D6
F6
F4
RSTL_A
RSTL_B
RSTL_C
RSTL_D
ILVCMOS External Reset.
Active low input that performs external hardware reset of all four
DSPLLs. Resets all internal logic to a known state and forces the
device registers to their default value. Clock outputs are tri-stated
during reset. The part must be programmed after a reset or
power-on to get a clock output. This pin has a weak pull-up.
B4
D8
H6
F2
IRQ_A
IRQ_B
IRQ_C
IRQ_D
OLVCMOS DSPLLq Interrupt Indicator.
This pin functions as a device interrupt output. The interrupt out-
put, IRQ_PINn must be set to 1. The pin functions as a maskable
interrupt output with active polarity controlled by the IRQ_POLn
register bit.
0 = CKINn present
1 = LOS (FOS) on CKINn
The active polarity is controlled by CK_BAD_POL. If no function
is selected, the pin tri-states.
C1, C4, B5
A7, D5, D7
E7, F5, G9
E3, F3, J3
VDD_A
VDD_B
VDD_C
VDD_D
VDD
Supply
Supply.
The device operates from a 1.8 or 2.5 V supply. A 0.1 F bypass
capacitive is required for every VDD_9 pin. Bypass capacitors
should be associated with the following VDD_q pins:
0.1 F per VDD pin.
Four 1.0 F should also be placed as close to each VDD domain
as is practical. See recommended layout.
E5
E6
OSC_P
OSC_N
I
Analog
External OSC.
An external low jitter reference clock should be connected to
these pins. See the any-frequency precision clocks family refer-
ence manual for oscillator selection details.
Note:
Internal register names are indicated by italics, e.g., IRQ_PIN. See Si5374 Register Map.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Si5374-EVB | 功能描述:時鐘和定時器開發(fā)工具 QUAD DSPLL 8IN/8OUT CLOCK EVAL KIT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| Si5375B-A-BL | 功能描述:時鐘合成器/抖動清除器 Loop BW 60Hz-8.4 kHz 4In/Out 2kHz-808MHz RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| Si5375B-A-GL | 功能描述:時鐘合成器/抖動清除器 QUAD DSPLL JITT ATT CLK ST LP BW 4IN/OUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| Si5375-EVB | 功能描述:時鐘和定時器開發(fā)工具 QUAD DSPLL 4IN/4OUT CLOCK EVAL KIT RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| SI5376B-A-BL | 制造商:Silicon Laboratories Inc 功能描述:QUAD DSPLL JITTER ATTENUATING CLOCK, - Trays 制造商:Silicon Laboratories Inc 功能描述:IC CLK GEN/JITTER ATTEN 80PBGA |
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