參數(shù)資料
型號(hào): SI5327D-C-GMR
廠(chǎng)商: SILICON LABORATORIES
元件分類(lèi): 時(shí)鐘產(chǎn)生/分配
英文描述: 243 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC36
封裝: 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36
文件頁(yè)數(shù): 21/60頁(yè)
文件大?。?/td> 715K
代理商: SI5327D-C-GMR
Si5327
28
Preliminary Rev. 0.4
Reset value = 0000 0000
Reset value = 0100 0000
Register 10.
Bit
D7D6D5D4D3D2D1D0
Name
DSBL2_
REG
DSBL1_
REG
Type
RR
R/W
RR
Bit
Name
Function
7:4
Reserved
3
DSBL2_REG DSBL2_REG.
This bit controls the powerdown of the CKOUT2 output buffer. If disable mode is
selected, the N2_LS output divider is also powered down.
0: CKOUT2 enabled
1: CKOUT2 disabled
2
DSBL1_REG DSBL1_REG.
This bit controls the powerdown of the CKOUT1 output buffer. If disable mode is
selected, the N1_LS output divider is also powered down.
0: CKOUT1 enabled
1: CKOUT1 disabled
1:0
Reserved
Register 11.
Bit
D7D6D5D4D3D2D1D0
Name
PD_CK2
PD_CK1
Type
RR
RRR
R
R/W
Bit
Name
Function
7:2
Reserved
1PD_CK2
PD_CK2.
This bit controls the powerdown of the CKIN2 input buffer.
0: CKIN2 enabled
1: CKIN2 disabled
0PD_CK1
PD_CK1.
This bit controls the powerdown of the CKIN1 input buffer.
0: CKIN1 enabled
1: CKIN1 disabled
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參數(shù)描述
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