參數(shù)資料
型號： SI3232PPTX-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 72/128頁
文件大?。?/td> 0K
描述： BOARD EVAL W/DISCRETE INTERFACE
標準包裝： 1
系列： ProSLIC®
主要目的： 接口，模擬前端（AFE）
已用 IC / 零件： Si3232
已供物品： 板，CD
Si3232
48
Preliminary Rev. 0.96
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 25. Pulse Metering Generation Block Diagram
4.14. Audio Path Processing
The Si3232 is designed to connect directly to integrated
access device (IAD) chipsets, such as the Broadcom
BCM3341, as well as other standard codecs that use a
differential audio interface. Figure 3 on page 15
illustrates the simplified block diagram for the Si3232.
4.14.1. Transmit Path
In the transmit path, the analog signal fed by the
external ac-coupling capacitors, C1 and C2, is amplified
by the analog transmit amplifier, ATX, prior to the
differential analog output to the A/D converter in the
external codec. The ATX stage can be used to add 3 dB
of attenuation by programming the ATX bit of the
AUDGAIN register. A mute function is also available by
setting the ATXMUTE bit of the AUDGAIN register to 1.
The main role of the ATX stage is to attenuate incoming
signals to best match the input scale of the external A/D
converter to maximize signal-to-noise ratio.
The resulting gain levels using the ATX stage are
summarized in Table 29. All settings assume a 0 dBm0
TIP-RING audio input signal with the audio TX level
measured differentially at VTXPa-VTXNa (for channel
a) or VTXPb-VTXNb (for channel b).
4.14.2. Receive Path
In the receive path, the incoming audio signal from the
D/A converter in the external codec is passed through
an ARX stage where the user can attenuate audio
signals in the analog domain prior to transmission to
TIP/RING. Settings of 0, –3, and –6 dB are available by
programming the ARX[1:0] bits of the AUDGAIN
register to the appropriate settings. A mute function is
also available by setting the ARXMUTE bit of the
AUDGAIN register to 1. When not muted, the resulting
analog
signal
is
applied
at
the
input
of
the
transconductance amplifier, Gm, which drives the off-
chip current buffer, IBUF.
Pulse
Metering
DAC
Pulse
Metering
Oscillator
Volume
PMRAMP
Peak Detector
PMAMPTH
Z
A
I
BUF
+
–
+
8 kHz
7FFF
or 0
Clip
Logic
–
+
12/16 kHz
Bandpass
To VTX outputs
From VRX inputs
+
Table 29. ATX Attenuation Stage Settings
ATXMUT
E
Setting
ATX
Setting
Typical TX Path Gain
1
X
Mute (no output)
0
–1.584 dB (G = 10/12)
0
1
–4.682 dB (G = 7/12)
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相關代理商/技術參數(shù)
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Si3233-C-FM 功能描述:射頻無線雜項 Single-Chan SLIC RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel
SI3233-C-FMR 功能描述:電信線路管理 IC Single-CH SLIC only BJT/inductor dc-dc RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
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