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參數(shù)資料
| 型號： | SI3232PPTX-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 22/128頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL W/DISCRETE INTERFACE |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ProSLIC® |
| 主要目的： | 接口，模擬前端（AFE） |
| 已用 IC / 零件： | Si3232 |
| 已供物品： | 板，CD |
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Si3232
118
Preliminary Rev. 0.96
Not
Recommended
fo
r N
ew
D
esi
gn
s
19, 62
SRINGACb,
SRINGACa
I
RING Transmit Input—
Analog input used to sense ac voltage on
RING side of subscriber loop.
20, 61
SRINGDCb,
SRINGDCa
I
RING Sense—
Analog current input used to sense dc voltage on
RING side of subscriber loop.
21, 60
ITIPNb, ITIPNa
O
Negative TIP Current Control—
Analog current output providing dc
current return path to VBAT from TIP side of the loop.
22, 59
IRINGNb, IRINGNa
O
Negative RING Current Control—
Analog current output providing
dc current return path to VBAT from RING side of loop.
23, 58
ITIPPb, ITIPPa
O
Positive TIP Current Control—
Analog current output driving dc cur-
rent onto TIP side of subscriber loop in normal polarity. Also modu-
lates ac current onto TIP side of loop.
24, 37,
42, 57
VDD2, VDD3,
VDD4, VDD1
Supply Voltage—
Power supply for internal analog and digital cir-
cuitry. Connect all VDD pins to the same supply and decouple to
adjacent GND pins as close to the pins as possible.
25, 38,
41, 56
GND2, GND3
GND4, GND1
Ground—
Ground connection for internal analog and digital circuitry.
Connect all pins to low-impedance ground plane.
26, 55
IRINGPb, IRINGPa
O
Positive RING Current Control—
Analog current output driving dc
current onto RING side of subscriber loop in reverse polarity. Also
modulates ac current onto RING side of loop.
27, 54
THERMb, THERMa
I
Temperature Sensor—
Used to sense the internal temperature of
the Si3200. Connect to THERM pin of Si3200 or to VDD when using
discrete linefeed circuit.
28
VCM
I
Common Mode Voltage Input
—Connect to external common mode
voltage source.
29, 30
VRXPb, VRXNb
I
Differential Analog Receive Input for SLIC Channel b.
31, 32
VTXPb, VTXNb
O
Differential Analog Transmit Output for SLIC Channel b.
33
RESET
I
Reset—
Active low. Hardware reset used to place all control registers
in known state. An internal pulldown resistor asserts this pin low
when it is not driven externally.
34
FSYNC
I
Frame Sync—
8 kHz frame synchronization signal for internal timing.
May be short or long pulse format.
35, 49
BATSELb, BATSELa
O
Battery Voltage Select Pin—
Used to switch between high and low
external battery supplies.
36, 48
GPOb, GPOa
O
General Purpose Driver Output—
Used to drive test relays for con-
necting loop test equipment or as a second battery select pin.
39
PCLK
I
PCM System Clock—
Master clock input.
40
INT
O
Interrupt—
Maskable interrupt output. Open drain output for wire-
ORed operation.
43
SCLK
I
Serial Port Bit Clock Input—
Controls serial data on SDO and
latches data on SDI.
44
SDO
O
Serial Port Data Out—
Serial port control data output.
45
SDI
I
Serial Port Data In—
Serial port control data input.
Pin #(s)
Symbol
Input/
Output
Description
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