參數(shù)資料
型號(hào): SDA 4335
廠商: SIEMENS AG
元件分類: 通用總線功能
英文描述: PLL Frequency Synthesizer, IF Counter, 7 bit ADC, 7 & 4 bit DAC(包含IF計(jì)數(shù)器,7位ADC,7和4位DAC的用于汽車(chē)收音機(jī)的鎖相環(huán)頻率合成器)
中文描述: 鎖相環(huán)頻率合成器,中頻計(jì)數(shù)器,7位ADC,7
文件頁(yè)數(shù): 31/33頁(yè)
文件大小: 676K
代理商: SDA 4335
Specification
SDA 4335
Semiconductor Group
31
21.5.99
Loop amplifier tuningvoltage output (Loopfilter output)
LOW output voltage
V
PDA_L
0
V
VCC
-
0.5V
tbd.
400
mV
I
TUNE
= 100 uA
HIGH output voltage
V
PDA_H
tbd.
V
CC
mV
I
TUNE
= -100 uA
HIGH output current source
LOW output current source
I
PDA_H
I
PDA_L
-2.4
-1.2
mA
V
TUNE
= 4V,
V
PD_1
= 0V,
V
PD_0
= 0V
(see Status,
Subaddress 00H,
bit D11)
IF_Counter
input sensitivity AM
input impedance AM
v
IF_1
Z
IF_1
50
tbd.
180
mV
k
f
IF_1
= 440...471kHz
f
IF_1
= 455kHz
f
IF_0
=
10.60...10.80MHz
f
IF_0
= 10.70MHz
input sensitivity FM
v
IF_0
50
tbd.
mV
input impedance FM
PLL for synthesizer
(
see PLL Synthesizer on page 16
)
PLL / VCO step size
(programmable via R-counter)
N-counter divide ratio
R-counter divide ratio
input sensitivity
input impedance
ADC converter ADC_IN1 / IN2
input voltage range
Sampling capacitance
least significant bit
zero offsetfailure
full scale
nonlinearity
coverting time for both cannels
DAC_7 converter PORT_7BIT
output voltage range
least significant bit
zero offsetfailure
full scale
nonlinearity
output current
output capacitance
Z
IF_0
10
k
f
ref
6.25
100
kHz
f
crystal
= 61.5 MHz
N
R
v
VCO
Z
VCO
2
2
50
65535
65535
16-Bit
16-Bit
f
VCO
= 70...120MHz
f
VCO
= 120MHz
tbd.
2.5
mV
k
v
ADC_IN1/2
C
S
v
LSB
V
ZERO
V
FS
V
f
CONV
0
VREFD5V
V
pF
mV
mV
V
LSB
us
tbd.
5
39, 37
tbd.
tbd.
VREFD5V
tbd.
+/-1.5
32
V
PORT_7BIT
0
V
LSB
V
ZERO
V
FS
V
I
PORT_7BIT
C
PORT_7BIT
5,40
V
mV
mV
V
LSB
uA
pF
tbd.
39.37
tbd.
tbd.
VREFD5V
tbd.
+/-1.5
50
10
Parameter
T
A
= 25
°
C,V
VCC
= 8.5V
Symbol
Limit Values
typ
Unit
Test conditions
min
max
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