參數(shù)資料
型號(hào): SC16C550BIBS,128
廠商: NXP Semiconductors
文件頁數(shù): 3/48頁
文件大?。?/td> 0K
描述: IC UART SOT617-1
標(biāo)準(zhǔn)包裝: 6,000
特點(diǎn): 可編程
通道數(shù): 1,UART
FIFO's: 16 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動(dòng)流量控制功能:
帶故障啟動(dòng)位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-HVQFN(5x5)
包裝: 帶卷 (TR)
其它名稱: 935279497128
SC16C550BIBS-F
SC16C550BIBS-F-ND
SC16C550B_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 1 October 2008
11 of 48
NXP Semiconductors
SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
6.3 Autoow control
Autoow control is comprised of auto-CTS and auto-RTS (see Figure 6). With auto-CTS,
the CTS input must be active before the transmitter FIFO can emit data. With auto-RTS,
RTS becomes active when the receiver needs more data and noties the sending serial
device. When RTS is connected to CTS, data transmission does not occur unless the
receiver FIFO has space for the data; thus, overrun errors are eliminated using UART 1
and UART 2 from a SC16C550B with the autoow control enabled. If not, overrun errors
occur when the transmit data rate exceeds the receiver FIFO read latency.
6.3.1 Auto-RTS
Auto-RTS data ow control originates in the receiver timing and control block (refer to
Figure 1 “Block diagram of SC16C550B”) and is linked to the programmed receiver FIFO
trigger level (see Figure 6). When the receiver FIFO level reaches a trigger level of 1, 4,
or 8 (see Figure 8), RTS is de-asserted. With trigger levels of 1, 4, and 8, the sending
UART may send an additional byte after the trigger level is reached (assuming the
sending UART has another byte to send) because it may not recognize the de-assertion of
RTS until after it has begun sending the additional byte. RTS is automatically reasserted
once the RX FIFO is emptied by reading the receiver buffer register. When the trigger level
is 14 (see Figure 9), RTS is de-asserted after the rst data bit of the 16th character is
present on the RX line. RTS is reasserted when the RX FIFO has at least one available
byte space.
6.3.2 Auto-CTS
The transmitter circuitry checks CTS before sending the next data byte (see Figure 6).
When CTS is active, it sends the next byte. To stop the transmitter from sending the
following byte, CTS must be released before the middle of the last stop bit that is currently
being sent (see Figure 7). The auto-CTS function reduces interrupts to the host system.
When ow control is enabled, CTS level changes do not trigger host interrupts because
the device automatically controls its own transmitter. Without auto-CTS, the transmitter
sends any data present in the transmit FIFO and a receiver overrun error may result.
Fig 6.
Autoow control (auto-RTS and auto-CTS) example
RX
FIFO
FLOW
CONTROL
TX
FIFO
PARALLEL
TO SERIAL
TX
FIFO
RX
FIFO
UART 1
UART 2
D7 to D0
RX
TX
RTS
CTS
TX
RX
CTS
RTS
D7 to D0
002aaa228
SERIAL TO
PARALLEL
SERIAL TO
PARALLEL
FLOW
CONTROL
FLOW
CONTROL
FLOW
CONTROL
PARALLEL
TO SERIAL
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