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參數(shù)資料
| 型號(hào)： | SAB-C161JI-32RF |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 16-Bit Single-Chip Microcontroller |
| 中文描述： | 16位單片機(jī) |
| 文件頁數(shù)： | 21/89頁 |
| 文件大小： | 876K |
| 代理商： | SAB-C161JI-32RF |
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C161CS/JC/JI-32R
C161CS/JC/JI-L
Data Sheet
17
V3.0, 2001-01
External Bus Controller
All of the external memory accesses are performed by a particular on-chip External Bus
Controller (EBC). It can be programmed either to Single Chip Mode when no external
memory is required, or to one of four different external memory access modes, which
are as follows:
– 16-/18-/20-/24-bit Addresses, 16-bit Data, Demultiplexed
– 16-/18-/20-/24-bit Addresses, 16-bit Data, Multiplexed
– 16-/18-/20-/24-bit Addresses, 8-bit Data, Multiplexed
– 16-/18-/20-/24-bit Addresses, 8-bit Data, Demultiplexed
In the demultiplexed bus modes, addresses are output on PORT1 and data is input/
output on PORT0 or P0L, respectively. In the multiplexed bus modes both addresses
and data use PORT0 for input/output.
Important timing characteristics of the external bus interface (Memory Cycle Time,
Memory Tri-State Time, Length of ALE and Read Write Delay) have been made
programmable to allow the user the adaption of a wide range of different types of
memories and external peripherals.
In addition, up to 4 independent address windows may be defined (via register pairs
ADDRSELx / BUSCONx) which control the access to different resources with different
bus characteristics. These address windows are arranged hierarchically where
BUSCON4 overrides BUSCON3 and BUSCON2 overrides BUSCON1. All accesses to
locations not covered by these 4 address windows are controlled by BUSCON0.
Up to 5 external CS signals (4 windows plus default) can be generated in order to save
external glue logic. The C161CS/JC/JI offers the possibility to switch the CS outputs to
an unlatched mode. In this mode the internal filter logic is switched off and the CS signals
are directly generated from the address. The unlatched CS mode is enabled by setting
CSCFG (SYSCON.6).
Access to very slow memories or memories with varying access times is supported via
a particular ‘Ready’ function.
A HOLD/HLDA protocol is available for bus arbitration and allows to share external
resources with other bus masters. The bus arbitration is enabled by setting bit HLDEN
in register PSW. After setting HLDEN once, pins P6.7 … P6.5 (BREQ, HLDA, HOLD)
are automatically controlled by the EBC. In Master Mode (default after reset) the HLDA
pin is an output. By setting bit DP6.7 to ‘1’ the Slave Mode is selected where pin HLDA
is switched to input. This allows to directly connect the slave controller to another master
controller without glue logic.
For applications which require less than 16 MBytes of external memory space, this
address space can be restricted to 1 MByte, 256 KByte, or to 64 KByte. In this case
Port 4 outputs four, two, or no address lines at all. It outputs all 8 address lines, if an
address space of 16 MBytes is used.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAB-C161JI-LF | 16-Bit Single-Chip Microcontroller |
| SAK-C161CS-32RF | 16-Bit Single-Chip Microcontroller |
| SAK-C161CS-LF | 16-Bit Single-Chip Microcontroller |
| SAK-C161JC-32RF | 16-Bit Single-Chip Microcontroller |
| SAK-C161JC-LF | 16-Bit Single-Chip Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAB-C161JI-LF | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
| SAB-C161JI-LF CA | 功能描述:16位微控制器 - MCU 16BIT ROM/ROMLESS RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| SAB-C161JI-LFCA | 制造商:Infineon Technologies AG 功能描述: |
| SAB-C161K-L16M | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit CMOS Single-Chip Microcontroller |
| SAB-C161K-L25M | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
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