參數(shù)資料
型號(hào): S71GL064A80BFW0B2
廠商: Spansion Inc.
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述: 堆疊式多芯片產(chǎn)品(MCP)的閃存和RAM
文件頁(yè)數(shù): 70/102頁(yè)
文件大小: 1606K
代理商: S71GL064A80BFW0B2
70
S71GL032A Based MCPs
S71GL032A_00_A0 March 31, 2005
A d v a n c e I n f o r m a t i o n
Erase and Program Operations-S29GL064A Only
Notes:
1.
Not 100% tested.
2.
See the “Erase and Programming Performance” section for more information.
3.
For 1–16 words/1–32 bytes programmed.
4.
If a program suspend command is issued within t
POLL
, the device requires t
POLL
before reading status data, once
programming has resumed (that is, the program resume command has been written). If the suspend command was issued
after t
POLL
, status data is available immediately after programming has resumed. See
Figure 16
.
Parameter
Speed Options
Unit
JEDEC
Std.
Description
90
10
11
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
90
100
110
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
ns
t
AHT
Address Hold Time From CE# or OE# high during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
35
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
CEPH
CE# High during toggle bit polling
Min
20
ns
t
OEPH
OE# High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
240
μs
Single Word Program Operation (Note 2)
Typ
60
Accelerated Single Word Program Operation (Note 2)
Typ
54
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
t
VHH
V
HH
Rise and Fall Time (Note 1)
Min
250
ns
t
VCS
V
CC
Setup Time (Note 1)
Min
50
μs
t
BUSY
WE# High to RY/BY# Low
Min
90
100
110
ns
t
POLL
Program Valid before Status Polling
Max
4
μs
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