參數(shù)資料
型號： S71GL064A80BFW0B2
廠商： Spansion Inc.
英文描述： Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述： 堆疊式多芯片產(chǎn)品（MCP）的閃存和RAM
文件頁數(shù)： 21/102頁
文件大小： 1606K
代理商： S71GL064A80BFW0B2
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
21
A d v a n c e I n f o r m a t i o n
Device Bus Operations
This section describes the requirements and use of the device bus operations,
which are initiated through the internal command register. The command register
itself does not occupy any addressable memory location. The register is a latch
used to store the commands, along with the address and data information
needed to execute the command. The contents of the register serve as inputs to
the internal state machine. The state machine outputs dictate the function of the
device.
Table 1
lists the device bus operations, the inputs and control levels they
require, and the resulting output. The following subsections describe each of
these operations in further detail.
Table 1. Device Bus Operations
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5
V, V
HH
= 11.5–12.5
V, X = Don’t Care, SA = Sector
Address, A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out
Notes:
1. Addresses are Amax:A0 in word mode; Amax:A-1 in byte mode. Sector addresses are Amax:A15 in both modes.
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the
“Sector Group Protection and Unprotection” section.
3. If WP# = V
IL
, the first or last sector remains protected (for uniform sector devices), and the two outer boot sectors
are protected (for boot sector devices). If WP# = V
IH
, the first or last sector, or the two outer boot sectors will be
protected or unprotected as determined by the method described in “Sector Group Protection and Unprotection”.
All sectors are unprotected when shipped from the factory (The Secured Silicon Sector may be factory protected
depending on version ordered.)
4. D
IN
or D
OUT
as required by command sequence, data polling, or sector protect algorithm (see
Figure 7
).
Operation
CE#
OE#
W E#
RESET#
W P#
ACC
Addresses
( Note 1)
DQ0–
DQ7
DQ8–DQ15
BYTE#
= V
IH
BYTE#
= V
IL
Read
L
L
H
H
X
X
A
IN
D
OUT
D
OUT
DQ8–DQ14
= High-Z,
DQ15 = A-1
Write (Program/Erase)
L
H
L
H
(Note 3)
X
A
IN
(Note 4)
(Note
4)
Accelerated Program
L
H
L
H
(Note 3)
V
HH
A
IN
(Note 4)
(Note
4)
Standby
V
CC
±
0.3 V
X
X
V
CC
±
0.3 V
X
H
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
X
X
X
High-Z
High-Z
High-Z
Reset
X
X
X
L
X
X
X
High-Z
High-Z
High-Z
Sector Group Protect
(Note 2)
L
H
L
V
ID
H
X
SA, A6 = L,
A3= L, A2= L,
A1= H, A0= L
(Note 4)
X
X
Sector Group
Unprotect
(Note 2)
L
H
L
V
ID
H
X
SA, A6= H,
A3= L, A2= L,
A1= H, A0= L
(Note 4)
X
X
Temporary Sector
Group Unprotect
X
X
X
V
ID
H
X
A
IN
(Note 4)
(Note
4)
High-Z
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