參數(shù)資料
型號(hào): S71GL064A08BAW0B2
廠商: SPANSION LLC
元件分類(lèi): 存儲(chǔ)器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA56
封裝: 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56
文件頁(yè)數(shù): 97/102頁(yè)
文件大?。?/td> 1606K
代理商: S71GL064A08BAW0B2
March 31, 2005 S71GL032A_00_A0
S71GL032A Based MCPs
97
A d v a n c e I n f o r m a t i o n
Data Retention Characteristics (4M Version F)
Notes:
1.
CS1 controlled:CS1#
V
CC
-0.2V. CS2 controlled: CS2
0.2V.
2.
Typical values are not 100% tested.
W
Write cycle time
t
WC
70
-
ns
Chip select to end of write
t
CW
60
-
ns
Address set-up time
t
AS
0
-
ns
Address valid to end of write
t
AW
60
-
ns
LB#, UB# valid to end of write
t
BW
60
-
ns
Write pulse width
t
WP
50
-
ns
Write recovery time
t
WR
0
-
ns
Write to output high-Z
t
WHZ
0
20
ns
Data to write time overlap
t
DW
30
-
ns
Data hold from write time
t
DH
0
-
ns
End write to output low-Z
t
OW
5
-
ns
Item
Symbol
Test Condition
Min
Typ
Max
Unit
V
CC
for data retention
V
DR
CS1#
V
CC
-0.2V (Note 1), V
IN
0V. BYTE# = V
SS
or V
CC
1.5
-
3.3
V
Data retention current
I
DR
V
CC
= 3.0V, CS1#
V
CC
-0.2V (Note 1), V
IN
0V
-
1.0
(Note 2)
10
μ
A
Data retention set-up time
t
SDR
See data retention waveform
0
-
-
ns
Recovery time
t
RDR
t
RC
-
-
Parameter List
Symbol
Speed Bins
Units
70ns
Min
Max
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