參數(shù)資料
型號(hào): S29GL064N11TFIV10
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
中文描述: 4M X 16 FLASH 3V PROM, 110 ns, PDSO56
封裝: LEAD FREE, MO-142EC, TSOP-56
文件頁數(shù): 44/79頁
文件大?。?/td> 2191K
代理商: S29GL064N11TFIV10
44
S29GL-N MirrorBit
Flash Family
S29GL-N_01_09 November 16, 2007
D a t a
S h e e t
Write an Address/Data pair to a different write-buffer-page than the one selected by the Starting Address
during the write buffer data loading stage of the operation.
Write data other than the Confirm Command after the specified number of data load cycles.
The abort condition is indicated by DQ1 =
1
, DQ7 = DATA# (for the last address location loaded), DQ6 =
toggle, and DQ5=
0
. A Write-to-Buffer-Abort Reset command sequence must be written to reset the device
for the next operation.
Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program
operation is in progress.
This flash device is capable of handling multiple write buffer programming operations
on the same write buffer address range without intervening erases. For applications requiring incremental bit
programming, a modified programming method is required; please contact your local Spansion
representative.
Any bit in a write buffer address range cannot be programmed from
0
back to a
1
.
Attempting to do so may cause the device to set DQ5=1, of cause the DQ7 and DQ6 status bits to indicate
the operation was successful. However, a succeeding read shows that the data is still
0
. Only erase
operations can convert a
0
to a
1
.
10.4.4
Accelerated Program
The device offers accelerated program operations through the WP#/ACC or ACC pin depending on the
particular product. When the system asserts V
HH
on the WP#/ACC or ACC pin. The device uses the higher
voltage on the WP#/ACC or ACC pin to accelerate the operation.
Note that the
WP#/
ACC pin must not be at
V
HH
for operations other than accelerated programming, or device damage may result. WP# contains an
internal pullup; when unconnected, WP# is at V
IH
.
Figure 10.1 on page 45
illustrates the algorithm for the program operation. Refer to the Erase and Program
Operations–
AC Characteristics
on page 64
for parameters, and
Figure 15.3 on page 65
for timing diagrams.
相關(guān)PDF資料
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S29GL064N11TFIV12 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
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S29GL064N11TFIV22 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology
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