參數(shù)資料
型號(hào): S25FL008A
廠商: Spansion Inc.
英文描述: 8-Megabit CMOS 3.0 Volt Flash Memory with 50 MHz SPI (Serial Peripheral Interface) Bus
中文描述: 8兆閃存的CMOS 3.0伏,50兆赫SPI存儲(chǔ)器(串行外設(shè)接口)總線
文件頁數(shù): 23/32頁
文件大?。?/td> 719K
代理商: S25FL008A
August31,2006 S25FL008A_00_B0
S25FL008A
21
D a t a
S h e e t
Figure 9.11
Deep Power Down (DP) Command Sequence
9.12
Release from Deep Power Down (RES)
The device requires the Release from Deep Power Down (RES) command to exit the Deep Power Down
mode. When the device is in the Deep Power Down mode, all commands except RES are ignored.
The host system must drive CS# low and write the RES command to SI. CS# must be driven low for the entire
duration of the sequence. The command sequence is shown in
Figure 9.12
and
Table 9.4
.
The host system must drive CS# high t
RES(max)
after the 8-bit RES command byte. The device transitions
from DP mode to the standby mode after a delay of t
RES
(see
Table 16.1 on page 25
). In the standby mode,
the device can execute any read or write command.
Figure 9.12
Release from Deep Power Down (RES) Command Sequence
9.12.1
Release from Deep Power Down and Read Electronic Signature (RES)
The device features an 8-bit Electronic Signature, which can be read using the RES command. See
Figure 9.13
and
Table 9.4
for the command sequence and signature value. The Electronic Signature is not to
be confused with the identification data obtained using the RDID command. The device offers the Electronic
Signature so that it can be used with previous devices that offered it; however, the Electronic Signature
should not be used for new designs, which should read the RDID data instead.
After the host system drives CS# low, it must write the RES command followed by 3 dummy bytes to SI (each
bit is latched on SI during the rising edge of SCK). The Electronic Signature is then output on SO; each bit is
shifted out on the falling edge of SCK. The RES operation is terminated by driving CS# high after the
Electronic Signature is read at least once. Additional clock cycles on SCK with CS# low cause the device to
output the Electronic Signature repeatedly.
C
S
#
S
CK
S
I
S
O
S
t
a
nd
b
y Mode
Deep Power-down Mode
Comm
a
nd
0
1
2
3
4
5
6
7
tDP
Hi-Z
Mode 0
Mode
3
C
S
#
S
CK
S
I
S
O
0
1
2
3
4
5
6
7
Comm
a
nd
Deep Power-down Mode
t
RE
S
S
t
a
nd
b
y Mode
Mode 0
Hi-Z
Mode
3
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