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參數(shù)資料
| 型號： | S25FL004AOLNFI000 |
| 廠商： | Spansion Inc. |
| 英文描述： | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| 中文描述： | 4兆位閃存的CMOS 3.0伏，50赫茲SPI總線接口內(nèi)存 |
| 文件頁數(shù)： | 25/39頁 |
| 文件大?。?/td> | 945K |
| 代理商： | S25FL004AOLNFI000 |
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March 28, 2005 S25FL004A_00_A1
S25FL Family (Serial Peripheral Interface) S25FL004A
23
A d v a n c e I n f o r m a t i o n
Figure 12. Page Program (PP) Instruction Sequence
Sector Erase (SE)
The Sector Erase (SE) instruction sets to 1 (FFh) all bits inside the chosen sector.
Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction is decoded, the
device sets the Write Enable Latch (WEL).
The Sector Erase (SE) instruction is entered by driving Chip Select (CS#) Low,
followed by the instruction code, and three address bytes on Serial Data Input
(SI). Any address inside the Sector (see
Table 2, on page 11
) is a valid address
for the Sector Erase (SE) instruction. Chip Select (CS#) must be driven Low for
the entire sequence duration.
The instruction sequence is shown in
Figure 13, on page 24
.
Chip Select (CS#) must be driven High after the eighth bit of the last address byte
is latched in, otherwise the Sector Erase (SE) instruction is not executed. As soon
as Chip Select (CS#) is driven High, the self-timed Sector Erase cycle (whose du-
ration is tSE) is initiated. While the Sector Erase cycle is in progress, the Status
Register may be read to check the Write In Progress (WIP) bit value. The Write
In Progress (WIP) bit is 1 during the self-timed Sector Erase cycle, and is 0 when
it is completed. At some unspecified time before the cycle is completed, the Write
Enable Latch (WEL) bit is reset.
A Sector Erase (SE) instruction applied to any memory area that is protected by
the Block Protect (BP2, BP1, BP0) bits (see
Table 2, on page 11
) is not executed.
0
34
33
32
31
30
29
28
10
9
8
7
6
5
4
3
2
1
3536 3738 39
46
45
44
43
42
41
40
4748 4950 51 52 5354 55
2
2
2
2
2
2
2
2
23 22 21
3
2
1
0
7
6
5
4
3
2
1
0
Data Byte 1
24-Bit Address
Instruction
Data Byte 2
Data Byte 3
Data Byte 256
MSB
MSB
MSB
MSB
MSB
SCK
SI
SCK
SI
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CS#
CS#
相關(guān)PDF資料 |
PDF描述 |
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| S25FL004A | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMAI001 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMAI002 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMAI003 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLMFI000 | 4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S25FL004AOLNFI001 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLNFI002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004AOLNFI003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4-Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface |
| S25FL004D0FMFI | 制造商:Spansion 功能描述: |
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