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參數(shù)資料
| 型號： | S1C63466F |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, QFP8-144 |
| 文件頁數(shù)： | 119/135頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | S1C63466F |
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76
EPSON
S1C63466 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmable Timer)
4.10.9 Programming notes
(1) When reading counter data, be sure to read the low-order 4 bits (PTD00–PTD03, PTD10–PTD13) first.
Furthermore, the high-order 4 bits (PTD04–PTD07, PTD14–PTD17) should be read within 0.73 msec
(when fOSC1 is 32.768 kHz) of reading the low-order 4 bits (PTD00–PTD03, PTD10–PTD13).
(2) The programmable timer actually enters RUN/STOP status in synchronization with the falling edge
of the input clock after writing to the PTRUN0/PTRUN1 register. Consequently, when "0" is written to
the PTRUN0/PTRUN1 register, the timer enters STOP status at the point where the counter is
decremented (-1). The PTRUN0/PTRUN1 register maintains "1" for reading until the timer actually
stops.
Figure 4.10.9.1 shows the timing chart for the RUN/STOP control.
PTRUN0/PTRUN1 (WR)
PTD0X/PTD1X
42H
41H 40H 3FH 3EH
3DH
PTRUN0/PTRUN1 (RD)
Input clock
"1" (RUN)
writing
"0" (STOP)
writing
Fig. 4.10.9.1 Timing chart for RUN/STOP control
It is the same even in the event counter mode. Therefore, be aware that the counter does not enter
RUN/STOP status if a clock is not input after setting the RUN/STOP control register (PTRUN0).
(3) Since the TOUT signal is generated asynchronously from the PTOUT register, a hazard within 1/2
cycle is generated when the signal is turned ON and OFF by setting the register.
(4) When the OSC3 oscillation clock is selected for the clock source, it is necessary to turn the OSC3
oscillation ON, prior to using the programmable timer. However the OSC3 oscillation circuit requires
a time at least 5 msec from turning the circuit ON until the oscillation stabilizes. Therefore, allow an
adequate interval from turning the OSC3 oscillation circuit ON to starting the programmable timer.
Refer to Section 4.3, "Oscillation Circuit", for the control and notes of the OSC3 oscillation circuit.
At initial reset, the OSC3 oscillation circuit is set in the OFF state.
(5) After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag =
"1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure
to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the
interrupt enabled state.
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