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參數(shù)資料
| 型號(hào)： | S1C63455D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, UUC105 |
| 封裝： | DIE-105 |
| 文件頁(yè)數(shù)： | 17/119頁(yè) |
| 文件大?。?/td> | 865K |
| 代理商： | S1C63455D |
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112
Rev. 1.0
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA SLICER and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306H1SFP
Transmit enable
bit(TE)
Transmit buffer
empty flag(TI)
Transmit register
empty flag (TXEPT)
Start
bit
Parity
bit
TxDi
CTSi
The above timing applies to the following settings :
Parity is enabled.
One stop bit.
CTS function is selected.
Transmit interrupt cause select bit = “1”.
“1”
“0”
“1”
“L”
“H”
“0”
“1”
Tc = 16 (n + 1) / fi or 16 (n + 1) / fEXT
fi : frequency of BRGi count source (f1, f8, f32)
fEXT : frequency of BRGi count source (external clock)
n : value set to BRGi
Transmit interrupt
request bit (IR)
“0”
“1”
Cleared to “0” when interrupt request is accepted, or cleared by software
Transmit enable
bit(TE)
Transmit buffer
empty flag(TI)
TxDi
Transmit register
empty flag (TXEPT)
“0”
“1”
“0”
“1”
“0”
“1”
Parity is disabled.
Two stop bits.
CTS function is disabled.
Transmit interrupt cause select bit = “0”.
Transfer clock
Tc
Tc = 16 (n + 1) / fi or 16 (n + 1) / fEXT
fi : frequency of BRGi count source (f1, f8, f32)
fEXT : frequency of BRGi count source (external clock)
n : value set to BRGi
Transmit interrupt
request bit (IR)
“0”
“1”
Shown in ( ) are bit symbols.
Tc
Transfer clock
D0 D1
D2 D3 D4 D5 D6 D7
ST
P
D0 D1 D2 D3
D4 D5 D6
D7
SP
ST
P
SP
D0 D1
ST
Stopped pulsing because transmit enable bit = “0”
Stop
bit
Transferred from UARTi transmit buffer register to UARTi transmit register
Start
bit
The transfer clock stops momentarily as CTS is “H” when the stop bit is checked.
The transfer clock starts as the transfer starts immediately CTS changes to “L”.
Data is set in UARTi transmit buffer register
D0 D1 D2 D3 D4 D5 D6 D7
ST
SP
D8
D0 D1 D2 D3 D4 D5 D6 D7
ST
D8
D0 D1
ST
SPSP
Transferred from UARTi transmit buffer register to UARTi transmit register
Stop
bit
Stop
bit
Data is set in UARTi transmit buffer register.
“0”
SP
Cleared to “0” when interrupt request is accepted, or cleared by software
Example of transmit timing when transfer data is 8 bits long (parity enabled, one stop bit)
Example of transmit timing when transfer data is 9 bits long (parity disabled, two stop bits)
Figure 2.11.17 Typical transmit timings in UART mode(UART0,UART1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1C63458F0A0100 | MICROCONTROLLER, PQFP144 |
| S1C63466D | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, UUC140 |
| S1C63466F | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP144 |
| S1C63567F0A0100 | MICROCONTROLLER, PQFP144 |
| S1C63653F | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C63557D04Q000 | 制造商:Seiko Instruments Inc (SII) 功能描述:EPSON MCU 4BIT |
| S1C63567 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63616 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63632 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63653 | 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
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