S1C63406 TECHNICAL MANUAL
EPSON
25
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Oscillation Circuit)
4.3.6 I/O memory of oscillation circuit
Table 4.3.6.1 shows the I/O address and the control bits for the oscillation circuit.
Table 4.3.6.1 Control bits of oscillation circuit
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
FF00H
CLKCHG OSCC
VDC1
VDC0
R/W
CLKCHG
OSCC
VDC1
VDC0
0
OSC3
On
OSC1
Off
CPU clock switch
OSC3 oscillation On/Off
CPU operating
voltage switch
0
1.1
1
1.3
2
1.5
3
1.7
[VDC1, 0]
VD1 (V)
*1 Initial value at initial reset
*2 Not set in the circuit
*3 Constantly "0" when being read
VDC1, VDC0: CPU operating voltage switching register (FF00HD1, D0)
Switchs the operating voltage VD1.
Table 4.3.6.2 CPU operating voltage and oscillation frequency
VDC1
1
0
VDC0
1
0
1
0
VD1
1.7 V
1.5 V
1.3 V
1.1 V
Oscillation circuit (frequency)
OSC3 CR, ceramic or crystal (4.2 MHz max.)
OSC3 CR (2.2 MHz max.)
OSC3 CR (700 kHz max.)
OSC1 Crystal or CR (80 kHz max.)
When switching the CPU system clock, the operating voltage VD1 should also be switched according to
the clock frequency.
When switching from OSC1 to OSC3, first set VD1 to the appropriate level. After that maintain 2.5 msec or
more, and then turn the OSC3 oscillation ON.
When switching from OSC3 to OSC1, turn the OSC3 oscillation OFF after switching to OSC1, and then set
VD1 to 1.1 V to reduce current consumption. When the VDC register is set to "0", do not turn the OSC3
oscillation ON.
At initial reset, this register is set to "0".
OSCC: OSC3 oscillation control register (FF00HD2)
Controls oscillation ON/OFF for the OSC3 oscillation circuit.
When "1" is written: OSC3 oscillation ON
When "0" is written: OSC3 oscillation OFF
Reading: Valid
When it is necessary to operate the CPU at high speed, set OSCC to "1". At other times, set it to "0" to
reduce current consumption. Furthermore, it is necessary to switch the operating voltage VD1 when
turning the OSC3 oscillation circuit ON and OFF.
At initial reset, this register is set to "0".
CLKCHG: CPU system clock switching register (FF00HD3)
The CPU's operation clock is selected with this register.
When "1" is written: OSC3 clock is selected
When "0" is written: OSC1 clock is selected
Reading: Valid
When the CPU clock is to be OSC3, set CLKCHG to "1"; for OSC1, set CLKCHG to "0".
After turning the OSC3 oscillation ON (OSCC = "1"), switching of the clock should be done after waiting
5 msec or more.
When OSC3 oscillation is OFF (OSCC = "0"), setting of CLKCHG = "1" becomes invalid and switching to
OSC3 is not performed.
At initial reset, this register is set to "0".