- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄98068 > S1C63406F 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP128 PDF資料下載
參數(shù)資料
| 型號(hào)： | S1C63406F |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP128 |
| 封裝： | PLASTIC, TQFP15-128 |
| 文件頁(yè)數(shù)： | 5/144頁(yè) |
| 文件大?。?/td> | 1160K |
| 代理商： | S1C63406F |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)
94
EPSON
S1C63406 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
4.11.10 Programming notes
(1) Be sure to initialize the serial interface mode in the transmit/receive disabled status (TXEN = RXEN =
"0").
(2) Do not perform double trigger (writing "1") to TXTRG (RXTRG) when the serial interface is in the
transmitting (receiving) operation.
(3) In the clock synchronous mode, since one clock line (SCLK) is shared for both transmitting and
receiving, transmitting and receiving cannot be performed simultaneously. (Half duplex only is
possible in clock synchronous mode.)
Consequently, be sure not to write "1" to RXTRG (TXTRG) when TXTRG (RXTRG) is "1".
(4) When a parity error or flaming error is generated during receiving in the asynchronous mode, the
receiving error interrupt factor flag ISER is set to "1" prior to the receive completion interrupt factor
flag ISRC for the time indicated in Table 4.11.10.1. Consequently, when an error is generated, you
should reset the receiving complete interrupt factor flag ISRC to "0" by providing a wait time in error
processing routines and similar routines.
When an overrun error is generated, the receiving complete interrupt factor flag ISRC is not set to "1"
and a receiving complete interrupt is not generated.
Table 4.11.10.1 Time difference between ISER and ISRC on error generation
Clock source
Time difference
fOSC3 / n
Programmable timer
1/2 cycles of fOSC3 / n
1 cycle of timer 1 underflow
(5) When the demultiplied signal of the OSC3 oscillation circuit is made the clock source, it is necessary
to turn the OSC3 oscillation ON, prior to using the serial interface.
A time interval of 5 msec, from the turning ON of the OSC3 oscillation circuit to until the oscillation
stabilizes, is necessary, due to the oscillation element that is used. Consequently, you should allow an
adequate waiting time after turning ON of the OSC3 oscillation, before starting transmitting/receiv-
ing of serial interface. (The oscillation start time will vary somewhat depending on the oscillator and
on the externally attached parts. Refer to the oscillation start time example indicated in Chapter 7,
"Electrical Chracteristics".)
At initial reset, the OSC3 oscillation circuit is set to OFF status.
(6) Be aware that the maximum clock frequency for the serial interface is limited to 2 MHz.
(7) After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag =
"1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure
to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the
interrupt enabled state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1C63408F0A0100 | MICROCONTROLLER, PQFP128 |
| S1C63406D0A0100 | MICROCONTROLLER, UUC103 |
| S1C63455F | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP128 |
| S1C63455D | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, UUC105 |
| S1C63458F0A0100 | MICROCONTROLLER, PQFP144 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C63408 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63557D04Q000 | 制造商:Seiko Instruments Inc (SII) 功能描述:EPSON MCU 4BIT |
| S1C63567 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63616 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63632 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:4-bit Single Chip Microcomputer |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。