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參數(shù)資料
| 型號： | RTL8201L |
| 英文描述： | Layout guide |
| 中文描述： | 布局指南 |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 73K |
| 代理商： | RTL8201L |
8201layoutguide(V1.00)
2000-11-08
REALTEK
Chip design & System design
7
!
For better performance on Power plane at 2-Layer design, please follow as shown:
7. For better and more stable analog performance:
!
The analog GND pins (29, 35, 45) must maintain a good ground return path, so
avoid using single ended ground, enlarge the analog GND plane, and try to keep the
analog circuit's return current back to the real GND(from ACR slot) as soon as
possible. This is especially important for 2-layer's layout.
!
For EMI's consideration, if you find that the EMI is a bit serious when read/write
from MII interface. You had better add some de-couple cap.(0.047uf, 22uf) between
the system GND-Power planes.
!
When using 25Mhz crystal as clock source, the spec. of crystal should pay more
attention, please refer to the attached crystal spec. When using crystal as spec. two
matching caps (20pF in schematic ) should be attached to the X1 and X2 pin.
!
When using oscillator as clock source (25Mhz), avoid attaching any cap on the
clock trace.
!
All analog power pins (pin 32, 36, 48) need a ferrite bead and these pins should be
de-coupled as the schematic file’s suggestion. Please pay special attention on pin 48.
These beads should be placed as close to RTL8201 as possible.
!
No GND plane partition is recommended, please keep the GND plane as large and
clear as possible.
!
When using regulator as 5V -> 3.3V, the rated current of this regulator should be at
least 300mA.
VDD from PCI VCC or Aux.
Power
better !
RTL8201
not good !
VDD
from
VCC
or
Aux.
Power
RTL8201
ACR
ACR
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