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參數(shù)資料
| 型號： | RH80530WZ014256 |
| 元件分類： | 微處理器 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 53/89頁 |
| 文件大?。?/td> | 1672K |
| 代理商： | RH80530WZ014256 |
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Mobile Intel
Pentium
III Processor-M Datasheet
298340-002
Datasheet
53
Table 33. 133-MHz AGTL Signal Group Overshoot/Undershoot Tolerance at the Processor Core
Allowed Pulse Duration (ns) [Tj=100C]
Max V
CCT
+ Overshoot/Undershoot
Magnitude
(volts)
Activity Factor = 0.01
Activity Factor = 0.1
Activity Factor = 1
1.78
1.5
0.15
0.015
1.73
3.5
0.35
0.035
1.68
7.2
0.72
0.072
1.63
15
1.5
0.15
1.58
15
3.2
0.32
1.53
15
6.5
0.65
1.48
15
14
1.40
NOTES:
1.
Under no circumstances should the sum of the Max V
CCT
and absolute value of the Overshoot/Undershoot
voltage exceed 1.78V.
2.
Activity factor of 1 represents the same toggle rate as the 133-MHz clock.
3.
Ringbacks below V
CCT
cannot be subtracted from overshoots. Lesser undershoot does not allocate longer or
larger overshoot.
4.
Ringbacks above ground cannot be subtracted from undershoots. Lesser overshoot does not allocate longer or
larger undershoot.
5.
System designers are encouraged to follow Intel provided AGTL layout guidelines.
6.
All values are specified by design characterization and are not tested.
Table 34. 100-MHz AGTL Signal Group Overshoot/Undershoot Tolerance at the Processor Core
Allowed Pulse Duration (ns) [Tj=100C]
Max V
CCT
+ Overshoot/Undershoot
Magnitude
(volts)
Activity Factor = 0.01 Activity Factor = 0.1
Activity Factor = 1
1.78
1.6
0.16
0.016
1.73
4.5
0.45
0.045
1.68
9.5
0.95
0.095
1.63
20
2.0
0.2
1.58
20
4.2
0.42
1.53
20
8.5
0.85
1.48
20
19
1.9
NOTES:
1.
Under no circumstances should the sum of the Max V
CCT
and absolute value of the Overshoot/Undershoot
voltage exceed 1.78V.
2.
Activity factor of 1 represents the same toggle rate as the 100-MHz clock.
3.
Ringbacks below V
CCT
cannot be subtracted from overshoots. Lesser undershoot does not allocate longer or
larger overshoot.
4.
Ringbacks above ground cannot be subtracted from undershoots. Lesser overshoot does not allocate longer or
larger undershoot.
5.
System designers are encouraged to follow Intel provided AGTL layout guidelines.
6.
All values are specified by design characterization and are not tested.
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