參數(shù)資料
型號(hào)： RH80530NZ001256
英文描述： Microprocessor
中文描述： 微處理器
文件頁數(shù)： 19/89頁
文件大小： 1672K
代理商： RH80530NZ001256
Mobile Intel
Pentium
III Processor-M Datasheet
298340-002
Datasheet
19
3.
Electrical Specifications
3.1
Processor System Signals
Table 5
lists the processor system signals by type. All AGTL signals are synchronous with the BCLK
and BCLK# signals. All TAP signals are synchronous with the TCK signal except TRST#. All CMOS
input signals can be applied asynchronously.
Table 5. System Signal Groups
Group Name
Signals
AGTL Input
BPRI#, DEFER#, RESET#, RSP#
AGTL Output
PRDY#
AGTL I/O
A[35:3]#, ADS#, AERR#, AP[1:0]#, BERR#, BINIT#, BNR#, BP[3:2]#, BPM[1:0]#,
BREQ0#, D[63:0]#, DBSY#, DEP[7:0]#, DRDY#, HIT#, HITM#, LOCK#, REQ[4:0]#,
RP#, RS[2:0]#, TRDY#
1.5V CMOS Input
A20M#, DPSLP#, FLUSH#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PREQ#, SMI#,
STPCLK#
1.8V CMOS Input
PWRGOOD
1.5V Open Drain Output
FERR#, IERR#
3.3V Open Drain Output
BSEL[1:0], VID[4:0]
1.25V input
GHI#, VTTPWRGD
Clock
BCLK, BCLK# (Differential Mode)
2.5V Clock Input
BCLK (Single Ended Mode)
APIC Clock
PICCLK
APIC I/O
PICD[1:0]
Thermal Diode
THERMDC, THERMDA
TAP Input
TCK, TDI, TMS, TRST#
TAP Output
TDO
Power/Other
CLKREF, CMOSREF, EDGECTRLP, NC, NCTRL, PLL1, PLL2, RTTIMPEDP, V
CC
,
V
CCT
, V
REF
, V
SS,
NOTES:
1. V
is the power supply for the core logic.
2. PLL1 and PLL2 are power/ground for the PLL analog section. See section 3.2.2 for details.
3. V
CCT
is the power supply for the system bus buffers.
4. V
REF
is the voltage reference for the AGTL input buffers.
5. V
SS
is system ground.
The APIC data and TAP outputs are Open-drain and should be pulled up to 1.5V using resistors with
the values shown in Table 6. If Open-drain drivers are used for input signals, then they should also be
pulled up to the appropriate voltage using resistors with the values shown in Table 6.
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