參數(shù)資料
型號(hào)： RH80530NZ001256
英文描述： Microprocessor
中文描述： 微處理器
文件頁(yè)數(shù)： 11/89頁(yè)
文件大?。?/td> 1672K
代理商： RH80530NZ001256
Mobile Intel
Pentium
III Processor-M Datasheet
298340-002
Datasheet
11
1.1
Overview
Performance features
— Supports the Intel Architecture with Dynamic Execution
— Supports the Intel Architecture MMX technology
— Supports Streaming SIMD Extensions for enhanced video, sound, and 3D performance
— Supports Enhanced Intel SpeedStep Technology
— Integrated Intel Floating Point Unit compatible with the IEEE 754 standard
— Data Prefetch Logic
On-die primary (L1) instruction and data caches
— 4-way set associative, 32-byte line size, 1 line per sector
— 16-Kbyte instruction cache and 16-Kbyte write-back data cache
— Cacheable range controlled by processor programmable registers
On-die second level (L2) cache
— 8-way set associative, 32-byte line size, 1 line per sector
— Operates at full core speed
— 512-Kbyte ECC protected cache data array
AGTL system bus interface
— 64-bit data bus, 100-MHz and 133-MHz operation
— Uniprocessor, two loads only (processor and chipset)
— Integrated termination
Processor clock control
— Quick Start for low power, low exit latency clock “throttling”
— Deep Sleep mode for lower power dissipation
— Deeper Sleep mode for lowest power dissipation
Thermal diode for measuring processor temperature
1.2
State of the Data
All information in this document is the best available information at the time of publication. Revisions
of this document will be provided on an as-required basis in the
Mobile Intel
Pentium
III
Processor
and Mobile Intel
Pentium
III
Processor-M Specification Update
.
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