LATJ(3) Read PORTJ " />
參數(shù)資料
型號: R5F56218BDLD#U0
廠商: Renesas Electronics America
文件頁數(shù): 102/148頁
文件大?。?/td> 0K
描述: MCU 32BIT FLASH 512K ROM 85TFLGA
產(chǎn)品培訓模塊: RX USB Peripheral
CAN Peripheral and API
RX 12-Bit ADC
RX Bus State Controller
RX Low Voltage Detection and Reset Sources
RX Watchdog Timer
RX 10-Bit ADC
RX 10-Bit DAC
RX Core
RX Compare Match Timer
RX DMAC
特色產(chǎn)品: RX600 Series Microcontrollers
標準包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,SCI,SPI,USB
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 58
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x10/12b,D/A 1x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 85-TFLGA
包裝: 托盤
2004 Microchip Technology Inc.
DS39609B-page 55
PIC18F6520/8520/6620/8620/6720/8720
LATJ(3)
Read PORTJ Data Latch, Write PORTJ Data Latch
xxxx xxxx
LATH(3)
Read PORTH Data Latch, Write PORTH Data Latch
xxxx xxxx
LATG
Read PORTG Data Latch, Write PORTG Data Latch
---x xxxx
LATF
Read PORTF Data Latch, Write PORTF Data Latch
xxxx xxxx
LATE
Read PORTE Data Latch, Write PORTE Data Latch
xxxx xxxx
LATD
Read PORTD Data Latch, Write PORTD Data Latch
xxxx xxxx
LATC
Read PORTC Data Latch, Write PORTC Data Latch
xxxx xxxx
LATB
Read PORTB Data Latch, Write PORTB Data Latch
xxxx xxxx
LATA
—LATA6(1)
Read PORTA Data Latch, Write PORTA Data Latch(1)
-xxx xxxx
PORTJ(3)
Read PORTJ pins, Write PORTJ Data Latch
xxxx xxxx
PORTH(3)
Read PORTH pins, Write PORTH Data Latch
xxxx xxxx
PORTG
Read PORTG pins, Write PORTG Data Latch
---x xxxx
PORTF
Read PORTF pins, Write PORTF Data Latch
xxxx xxxx
PORTE
Read PORTE pins, Write PORTE Data Latch
xxxx xxxx
PORTD
Read PORTD pins, Write PORTD Data Latch
xxxx xxxx
PORTC
Read PORTC pins, Write PORTC Data Latch
xxxx xxxx
PORTB
Read PORTB pins, Write PORTB Data Latch
xxxx xxxx
PORTA
—RA6(1)
Read PORTA pins, Write PORTA Data Latch(1)
-x0x 0000
TMR4
Timer4 Register
0000 0000
PR4
Timer4 Period Register
1111 1111
T4CON
T4OUTPS3 T4OUTPS2 T4OUTPS1
T4OUTPS0
TMR4ON
T4CKPS1
T4CKPS0 -000 0000
CCPR4H
Capture/Compare/PWM Register 4 High Byte
xxxx xxxx
CCPR4L
Capture/Compare/PWM Register 4 Low Byte
xxxx xxxx
CCP4CON
DC4B1
DC4B0
CCP4M3
CCP4M2
CCP4M1
CCP4M0
0000 0000
CCPR5H
Capture/Compare/PWM Register 5 High Byte
xxxx xxxx
CCPR5L
Capture/Compare/PWM Register 5 Low Byte
xxxx xxxx
CCP5CON
DC5B1
DC5B0
CCP5M3
CCP5M2
CCP5M1
CCP5M0
0000 0000
SPBRG2
USART2 Baud Rate Generator
0000 0000
RCREG2
USART2 Receive Register
0000 0000
TXREG2
USART2 Transmit Register
0000 0000
TXSTA2
CSRC
TX9
TXEN
SYNC
—BRGH
TRMT
TX9D
0000 -010
RCSTA2
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
0000 000x
TABLE 4-3:
REGISTER FILE SUMMARY (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Details
on page:
Legend:
x
= unknown, u = unchanged, – = unimplemented, q = value depends on condition
Note 1:
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator modes only and read ‘0’ in all other oscillator
modes.
2:
Bit 21 of the TBLPTRU allows access to the device configuration bits.
3:
These registers are unused on PIC18F6X20 devices; always maintain these clear.
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