In fact a current sink contributor " />
參數(shù)資料
型號(hào): PPC5605BCLU64
廠商: Freescale Semiconductor
文件頁數(shù): 86/112頁
文件大?。?/td> 0K
描述: MCU 32BIT 768K 64MHZ
標(biāo)準(zhǔn)包裝: 40
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 64MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 149
程序存儲(chǔ)器容量: 768KB(768K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 4K x 16
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 29x10b,5x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 176-LQFP
包裝: 托盤
Electrical characteristics
MPC5607B Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
75
In fact a current sink contributor is represented by the charge sharing effects with the sampling capacitance: being CS and Cp2
substantially two switched capacitances, with a frequency equal to the conversion rate of the ADC, it can be seen as a resistive
path to ground. For instance, assuming a conversion rate of 1 MHz, with CS+Cp2 equal to 3 pF, a resistance of 330 k is
obtained (REQ = 1 / (fc ×(CS+Cp2)), where fc represents the conversion rate at the considered channel). To minimize the error
induced by the voltage partitioning between this resistance (sampled voltage on CS+Cp2) and the sum of RS + RF, the external
circuit must be designed to respect the Equation 4:
Eqn. 4
Equation 4 generates a constraint for external network design, in particular on a resistive path.
Figure 17. Input equivalent circuit (precise channels)
V
A
R
S
R
F
+
R
EQ
---------------------
1
2
---LSB
RF
CF
RS
RL
RSW1
CP2
CS
VDD
Sampling
Source
Filter
Current Limiter
EXTERNAL CIRCUIT
INTERNAL CIRCUIT SCHEME
RS
Source Impedance
RF
Filter Resistance
CF
Filter Capacitance
RL
Current Limiter Resistance
RSW1 Channel Selection Switch Impedance
RAD Sampling Switch Impedance
CP
Pin Capacitance (two contributions, CP1 and CP2)
CS
Sampling Capacitance
CP1
RAD
Channel
Selection
VA
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