參數(shù)資料
型號(hào)： PPC5605BCLU64
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 67/112頁(yè)
文件大?。?/td> 0K
描述： MCU 32BIT 768K 64MHZ
標(biāo)準(zhǔn)包裝： 40
系列： MPC56xx Qorivva
核心處理器： e200z0h
芯體尺寸： 32-位
速度： 64MHz
連通性： CAN，I²C，LIN，SCI，SPI
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 149
程序存儲(chǔ)器容量： 768KB（768K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大小： 4K x 16
RAM 容量： 64K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 29x10b，5x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 176-LQFP
包裝： 托盤(pán)
MPC5607B Microcontroller Data Sheet, Rev. 7
Electrical characteristics
Freescale Semiconductor
58
4.8.2
Low voltage detector electrical characteristics
The device implements a power-on reset (POR) module to ensure correct power-up initialization, as well as five low voltage
detectors (LVDs) to monitor the VDD and the VDD_LV voltage while device is supplied:
POR monitors VDD during the power-up phase to ensure device is maintained in a safe reset state (refer to RGM Destructive
Event Status (RGM_DES) Register flag F_POR in device reference manual)
LVDHV3 monitors VDD to ensure device reset below minimum functional supply (refer to RGM Destructive Event Status
(RGM_DES) Register flag F_LVD27 in device reference manual)
LVDHV3B monitors VDD_BV to ensure device reset below minimum functional supply (refer to RGM Destructive Event
Status (RGM_DES) Register flag F_LVD27_VREG in device reference manual)
LVDHV5 monitors VDD when application uses device in the 5.0 V ± 10% range (refer to RGM Functional Event Status
(RGM_FES) Register flag F_LVD45 in device reference manual)
LVDLVCOR monitors power domain No. 1 (refer to RGM Destructive Event Status (RGM_DES) Register flag
F_LVD12_PD1 in device reference manual)
LVDLVBKP monitors power domain No. 0 (refer to RGM Destructive Event Status (RGM_DES) Register flag
F_LVD12_PD0 in device reference manual)
NOTE
When enabled, power domain No. 2 is monitored through LVDLVBKP.
Figure 10. Low voltage detector vs reset
4 External regulator and capacitance circuitry must be capable of providing I
DD_BV while maintaining supply VDD_BV in
operating range.
5 In-rush average current is seen only for short time during power-up and on standby exit (maximum 20 s, depending
on external capacitances to be loaded).
6 The duration of the in-rush current depends on the capacitance placed on LV pins. BV decoupling capacitors must
be sized accordingly. Refer to IMREG value for minimum amount of current to be provided in cc.
VDD
VLVDHVxH
RESET
VLVDHVxL
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