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參數(shù)資料
| 型號： | PIC14000T-20I/SS |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 118/153頁 |
| 文件大小： | 0K |
| 描述： | IC MCU OTP 4KX14 A/D 28SSOP |
| 產(chǎn)品培訓模塊： | Asynchronous Stimulus |
| 標準包裝： | 2,100 |
| 系列： | PIC® 14 |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | I²C |
| 外圍設(shè)備： | POR，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 20 |
| 程序存儲器容量： | 7KB（4K x 14） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 192 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | 斜率 A/D |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 包裝： | 帶卷 (TR) |
| 配用： | 309-1025-ND - ADAPTER 28-SSOP TO 28-DIP |
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1996 Microchip Technology Inc.
Preliminary
DS40122B-page 67
PIC14000
FIGURE 9-2:
SLOPE REFERENCE DIVIDER
+
Bandgap
Reference
_
REFOFF (SLPCON<5>)
ADOFF (SLPCON<0>)
SREFHI
SREFLO
VREF
To A/D
MUX
SREFLO
SREFHI
~
9
SREFLO
SREFHI - SREFLO
KREF
=
9.5
Comparator and Programmable
Reference Modules
9.5.1
COMPARATORS
The PIC14000 includes two independent low-power
comparators for comparing the programmable refer-
ence outputs to either the RA1/AN1 or RA5/AN5 pins.
The negative input of each comparator is tied to one of
the reference outputs as shown in Figure 9-3. The
comparator positive inputs are connected to the output
of the RA1/AN1 and RA5/AN5 level-shift networks.
At reset, the RA1/AN1 level-shift output is connected to
the positive inputs of both comparators. This allows a
window comparison of the RA1/AN1 voltage using the
two programmable references and comparators. Set-
ting CMBOE (CMCON<5>) changes the conguration
so that RA1/AN1 and RA5/AN5 may be independently
monitored.
The comparator outputs can be read by the CMAOUT
(CMCON<2>) and CMBOUT (CMCON<6>) bits. These
are read-only bits and writes to these locations have no
effect.
Either a rising or falling comparator output can gener-
ate an interrupt to the CPU as controlled by the polarity
bits CPOLA (CMCON<0>) and CPOLB (CMCON<4>).
The CMIF bit (PIR1<7>) interrupt ag is set whenever
the exclusive-OR of the comparator output CMxOUT
and the CPOLx bits equal a logic one. As with other
peripheral interrupts, the corresponding enable bit
CMIE (PIE1<7>) must also be set to enable the com-
parator interrupt. In addition, the global interrupt enable
and peripheral interrupt enable bits INTCON<7:6>
must also be set. This comparator interrupt is level sen-
sitive.
The
comparator
outputs
are
visible
at
either
RC1/CMPA or RD2/CMPB pins by setting the CMAOE
(CMCON<1>) or CMBOE (CMCON<5>) bits. Setting
CMxOE does not affect the comparator operation. It
only enables the pin function regardless of the port
TRIS register setting.
Both the references and the comparators are enabled
by clearing the CMOFF (SLPCON<2>) bit.
9.5.2
PROGRAMMABLE REFERENCES
The PIC14000 includes two independent, programma-
ble voltage references. Each reference is built using
two resistor ladders, bandgap-referenced current
source, and analog multiplexers. The rst ladder con-
tains 32 taps, and is divided into three ranges (upper,
middle, and lower) to provide a coarse voltage adjust-
ment. The coarse ladder includes 1k and 10k resistors
yielding a step size of either 5 or 50 mV (nominal)
depending on the selected range. Figure 9-8 shows the
comparator and reference architecture.
A second ladder contains eight taps, and is connected
across the selected coarse ladder resistor to increase
resolution. This subdivides the coarse ladder step by
approximately 1/8. Thus, resolutions approaching 5/8
mV are obtainable.
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