參數(shù)資料
型號(hào)： PIC10F222-E/OT
廠商： Microchip Technology
文件頁(yè)數(shù)： 8/86頁(yè)
文件大?。?/td> 0K
描述： IC PIC MCU FLASH 512X12 SOT-23-6
標(biāo)準(zhǔn)包裝： 3,000
系列： PIC® 10F
核心處理器： PIC
芯體尺寸： 8-位
速度： 8MHz
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 4
程序存儲(chǔ)器容量： 768B（512 x 12）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 23 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： SOT-23-6
包裝： 散裝
PIC10F220/222
DS41270E-page 14
2007 Microchip Technology Inc.
4.3
Data Memory Organization
Data memory is composed of registers or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: Special Function Registers (SFR)
and General Purpose Registers (GPR).
The Special Function Registers include the TMR0 reg-
ister, the Program Counter (PCL), the STATUS register,
the I/O register (GPIO) and the File Select Register
(FSR). In addition, Special Function Registers are used
to control the I/O port configuration and prescaler
options.
The General Purpose Registers are used for data and
control information under command of the instructions.
For the PIC10F220, the register file is composed of 9
Special Function Registers and 16 General Purpose
For the PIC10F222, the register file is composed of 9
Special Function Registers and 23 General Purpose
Registers (Figure 4-4).
4.3.1
GENERAL PURPOSE REGISTER
FILE
The General Purpose Register file is accessed, either
directly or indirectly, through the File Select Register
FIGURE 4-3:
PIC10F220 REGISTER
FILE MAP
FIGURE 4-4:
PIC10F222 REGISTER
FILE MAP
4.3.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
File Address
00h
01h
02h
03h
04h
05h
06h
07h
10h
INDF(1)
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
General
Purpose
Registers
Note 1:
Not a physical register. See Section 4.9
2:
Unimplemented, read as 00h.
08h
ADCON0
0Fh
1Fh
Unimplemented(2)
ADRES
09h
File Address
00h
01h
02h
03h
04h
05h
06h
07h
1Fh
INDF(1)
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
Note 1:
Not a physical register. See Section 4.9
08h
ADRES
09h
ADCON0
General
Purpose
Registers
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