參數(shù)資料
型號(hào)： PI7C7300DNAE
廠商： Pericom
文件頁數(shù)： 99/107頁
文件大小： 0K
描述： IC PCI-PCI BRIDGE 3PORT 272-BGA
標(biāo)準(zhǔn)包裝： 40
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 272-BBGA
供應(yīng)商設(shè)備封裝： 272-PBGA（27x27）
包裝： 管件
安裝類型： 表面貼裝
PI7C7300D
3-PORT PCI-TO-PCI BRIDGE
Page 91 of 107
Pericom Semiconductor
November 2005 - Revision 1.01
14.1.38
MASTER TIMEOUT COUNTER REGISTER – OFFSET 74h
Bit
Function
Type
Description
31:16
Master Timeout
R/W
Holds the maximum number of PCI clocks that PI7C7300D will wait
for initiator to retry the same cycle before reporting timeout. Master
timeout occurs after 2
10 PCI clocks.
Default is 400h.
14.1.39
RETRY COUNTER REGISTER – OFFSET 78h
Bit
Function
Type
Description
31:0
Retry Counter
R/W
Holds the maximum number of attempts that PI7C7300D will try
before reporting retry timeout. Retry count set at 2
24 PCI clocks.
Default is 0100 0000h.
14.1.40
SAMPLING TIMER REGISTER – OFFSET 7Ch
Bit
Function
Type
Description
31:0
Sampling Timer
R/W
Sets the duration (in PCI clocks) during which PI7C7300D will
record the number of successful transactions for performance
evaluation. The recording will start right after this register is
programmed and will be cleared after the timer expires. Maximum
period is 128 seconds at 33MHz.
Reset to 0.
14.1.41
SECONDARY SUCCESSFUL I/O READ COUNTER REGISTER –
OFFSET 80h
Bit
Function
Type
Description
31:0
Successful I/O
Read Counts on
S1 or S2
R/W
Stores the successful I/O read count on S1 or S2 and is updated when
the sampling timer is active.
Reset to 0
14.1.42
SECONDARY SUCCESSFUL I/O WRITE COUNTER REGISTER –
OFFSET 84h
Bit
Function
Type
Description
31:0
Successful I/O
Write Counts on
S1 or S2
R/W
Stores the successful I/O write count on S1 or S2 and is updated
when the sampling timer is active.
Reset to 0
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PI7C8140AEVB 功能描述:界面開發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
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