參數(shù)資料
型號(hào): PI2EQX5904NJE
廠商: Pericom
文件頁(yè)數(shù): 17/23頁(yè)
文件大?。?/td> 0K
描述: IC PCIE 2.0 REDRIVER 100LBGA
標(biāo)準(zhǔn)包裝: 1
系列: PCI Express®(PCIe), ReDriver™
類型: 轉(zhuǎn)接驅(qū)動(dòng)器
驅(qū)動(dòng)器/接收器數(shù): 2/2
規(guī)程: PCIe? 2.0
電源電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 100-BGA
供應(yīng)商設(shè)備封裝: 100-LBGA(11x11)
包裝: 托盤(pán)
3
www.pericom.com
PS-0.5
10/18/10
All trademarks are property of their respective owners.
PI2EQX5904
5.0Gbps 4-Lane PCIe 2.0 ReDriver with Equalization & Emphasis
Pin #
Pin Name
Type
Description
Control Signals
H6, F6, K6
A0, A1, A4
I
I2C programmable address bit A0, A1 and A4.
E4, E5, D5
D[0:2]_A
I
Selection pins for Channel Ax emphasis (See emphasis Configuration Table) w/
100K-Ohm internal pull up.
G6, J6, K5
D[0:2]_B
I
Selection pins for Channel Bx emphasis (See emphasis Configuration Table) w/
100K-Ohm internal pull up.
B5
DE_A
I
De-emphasis enable input for Channel A0, A1, A2 and A3 with internal 100K-
Ohm pull-up resistor. Set high selects output de-emphasis and set low selects
output half bit de-emphasis.
H5
DE_B
I
De-emphasis enable input for Channel B0, B1, B2 and B3 with internal 100K-
Ohm pull-up resistor. Set high selects output de-emphasis and set low selects
output half bit de-emphasis.
F8
LB#
I
Input with internal 100K-Ohm pull-up resistor. LB# = High or open for normal
operation. LB# = Low for loopback connection of A_RX to A_TX and B_TX.
G5
MODE
I
Input switch between pin control and I2C control with internal 100k-ohm pull-
up resistor. A LVCMOS high level selects input pin control, and disables I2C
operation. Note, during startup, input status of the control pin (LB#, RESET#,
PD#, RXD_A/B, SEL0-2_A/B, D0-2_A/B, S0-1_A/B, DE_A/B) will be latched to
the initial state of some I2C control pins only once.
C6
PD#
I
Input with internal 100K-Ohm pull-up resistor, PD# =High or open is normal
operation, PD# =Low disable the IC, and set IC to power down mode, both input
and output go Hi-Z.
D6
NC
No Connect
C5
NC
No Connect
J5
RESET#
I
RESET# is an active low channel reset input for Channel A0, B0, A1, B1, A2, B2,
A3 and B3 with internal 100K-Ohm pull-up resistor. When low, the receiver
detection cycle is reset, and normal detection cycle is started after the pin goes
high.
E10
RX50_A
O
Receiver detect output pin for Channel A0. RX50_A=High
indicates that a 50-Ohm termination was sensed at the A0TX+/- outputs.
F1
RX50_B
O
Receiver detect output pin for Channel B0. RX50_B=High
indicates that a 50-Ohm termination was sensed at the B0TX+/- outputs.
E7
RXD_A
I
Receiver detect enable input for Channel A0, A1, A2 and A3 with internal 100K-
Ohm pull-up resistor.
F4
RXD_B
I
Receiver detect enable input for Channel B0, B1, B2 and B3 with internal 100K-
Ohm pull-up resistor.
E6, E8
S[0:1]_A
I
Selection pins for Channel Ax output level (see Output Swing Configuration
Table) w/ 100K-Ohm internal pull up.
F5, F3
S[0:1]_B
I
Selection pins for Channel Bx output level (see Output Swing Configuration
Table) w/ 100K-Ohm internal pull up.
A5
SCL
I/O
I2C SCL clock input.
A6
SDA
I/O
I2C SDA data input.
Pin Description (continued..)
10-0217
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