參數(shù)資料
型號(hào): PDM41024SA10TTY
元件分類: SRAM
英文描述: 128K X 8 STANDARD SRAM, 10 ns, PDSO32
文件頁(yè)數(shù): 8/8頁(yè)
文件大?。?/td> 301K
代理商: PDM41024SA10TTY
PDM41024
8
4/09/98 - Rev. 3.3
Low VCC Data Retention Waveform
Data Retention Electrical Characteristics (LA Version Only) for JEDEC Version
NOTES: (For three previous Electrical Characteristics tables)
1. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured
±200 mV from steady state voltage.
2. At any given temperature and voltage condition, tHZCE is less than tLZCE.
3. This parameter is sampled.
4. WE is high for a READ cycle.
5. The device is continuously selected. All the Chip Enables are held in their active state.
6. The address is valid prior to or coincident with the latest occurring Chip Enable.
7. Vcc = 5V
± 5%.
Ordering Information
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VDR
VCC for Retention Data
2—
V
ICCDR
Data Retention Current
CE1
≥ V
CC – 0.2V or
CE2
≤ V
SS + 0.2V
VIN ≥ VCC – 0.2V
or
≤ 0.2V
VCC = 2V
500
A
VCC = 3V
750
A
tCDR
Chip Deselect to Data Retention Time
0
ns
tR
(3)
Operation Recovery Time
tRC
——
ns
DON'T CARE
VCC
V
IH
IL
t CDR
V
t R
4.5V
Data Retention Mode
CE1
DR
CE2
VDR
≤ 0.2V
V
IH
IL
Device Type
Power
Speed
Package
Type
Process
Temp. Range
Preferred
Shipping
Container
Commercial (0
° to +70°C)
10
Commercial Only
12
15
(use 15 ns for slower designs)
SA
Standard Power
LA
Low Power
Blank
I
Industrial (-40
° to +85°C)
A
Automotive (-40
° to +105°C)
Blank Tubes
TR
Tape & Reel
TY
Tray
PDM41024 - 1 Meg (128Kx8) Static RAM
XXXXX
X
XX
X
TSO
32-pin 300-mil Plastic SOJ
SO
32-pin 400-mil Plastic SOJ
T
32-pin Plastic TSOP (I)
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