參數(shù)資料
型號(hào): PDM21096LL12ST
元件分類: SRAM
英文描述: 512K X 8 STANDARD SRAM, 120 ns, PDSO32
封裝: PLASTIC, STSOP1-32
文件頁(yè)數(shù): 6/8頁(yè)
文件大?。?/td> 277K
代理商: PDM21096LL12ST
PDM21096LL
6
Rev. 0.0 - 4/30/98
ADVANCED
Read Cycle No. 1(1)
Read Cycle No. 2(2)
AC Electrical Characteristics
Description
-10
-12
READ Cycle
Sym
Min. Max. Min. Max. Units
READ cycle time
tRC
100
120
ns
Address access time
tAA
100
120
ns
Chip enable access time
tACE
100
120
ns
Output hold from address change
tOH
10
ns
Chip enable to output in low Z(3,4,5)
tLZCE
10
ns
Chip disable to output in high Z(3,4,5)
tHZCE
35
ns
Output enable access time
tAOE
50
ns
Output enable to output in low Z(4,5)
tLZOE
10
ns
Output disable to output in high Z(4,5)
tHZOE
30
ns
tRC
tAA
tOH
PREVIOUS DATA VALID
DOUT
ADDR
DATA VALID
tRC
tACE
tAA
tLZCE
tHZCE
tLZOE
tHZOE
tAOE
ADDR
CE
OE
DOUT
DATA VALID
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