
2
5
P
P
L
P
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16
‘write data’ to DDRAM
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Ack
0
1
0
1
0
(optional I
2
C-bus stop) I
2
C-bus start start + slave
address for write (as step 8)
control byte
Co
RS
0
0
0
1
0
0
0
0
return home
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Ack
0
0
0
0
0
PHILIPS_
writes ‘S’
0
1
1
1
17
PHILIPS_
18
0
0
0
0
0
0
Ack
1
PHILIPS_
19
PHILIPS
sets DDRAM address 0 in address counter (also returns shifted
display to original position; DDRAM contents unchanged); this
instruction does not update the Data Register (DR)
0
1
0
1
20
21
I
2
C-bus start
slave address for read
SA6 SA5 SA4 SA3 SA2 SA1 SA0 R/W Ack
0
1
1
1
0
PHILIPS
PHILIPS
during the acknowledge cycle the content of the DR is loaded
into the internal I
2
C-bus interface to be shifted out; in the
previous instruction neither a ‘set address’ nor a ‘read data’ has
been performed; therefore the content of the DR was unknown;
the R/W has to be set to 1 while still in I
2
C-write mode
1
0
1
1
22
control byte for read
Co
RS
0
1
‘read data’: 8
×
SCL + master acknowledge; note 2
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Ack
X
X
X
X
X
0
1
0
0
0
0
0
0
0
0
0
0
Ack
1
PHILIPS
DDRAM content will be read from following instructions
23
PHILIPS
8
×
SCL; content loaded into interface during previous
acknowledge cycle is shifted out over SDA; MSB is DB7; during
master acknowledge content of DDRAM address 01 is loaded
into the I
2
C-bus interface
X
X
X
0
24
‘read data’: 8
×
SCL + master acknowledge; note 2
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Ack
0
1
0
0
1
PHILIPS
8
×
SCL; code of letter ‘H’ is read first; during master
acknowledge code of ‘I’ is loaded into the I
2
C-bus interface
0
0
0
0
STEP
I
2
C-BUS BYTE
DISPLAY
OPERATION