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參數(shù)資料
| 型號： | PCD5002A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Enhanced Pager Decoder for APOC1/POCSAG |
| 中文描述： | 增強傳呼機解碼器APOC1/POCSAG |
| 文件頁數(shù)： | 10/48頁 |
| 文件大?。?/td> | 252K |
| 代理商： | PCD5002A |
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1999 Jan 08
10
Philips Semiconductors
Product specification
Enhanced Pager Decoder for
APOC1/POCSAG
PCD5002A
When a message extends beyond the end of a batch no
testing for sync takes place. Instead, a message data
transfer will be initiated by an interrupt to the external
controller. Data reception continues normally after a period
corresponding to the sync word duration.
If any message code-word is found to be uncorrectable,
the ‘data fail’ mode is entered and no data transfer will be
attempted at the next sync word position. Instead, a test for
sync word will be carried out.
In the
data fail
mode message reception continues
normally for 1 batch duration. When a sync word is
detected at the expected position the decoder returns to
the ‘data receive’ mode. If the sync word again fails to
appear, then batch synchronization is deemed lost. Call
reception is then terminated and the ‘fade recovery’ mode
is entered.
The
fade recovery
mode is intended to scan for sync word
and preamble over an extended window (nominal
position
±
8 bits). This is performed for a period of up to
15 batches, allowing recovery of synchronization from
long fades in the radio signal. Detection of preamble
causes switching to the ‘preamble receive’ mode, while
sync word detection causes switching to the ‘data receive’
mode. When neither is found within a period of 15 batches,
the radio signal is considered lost and the ‘carrier off’ mode
is entered.
The purpose of the
carrier off
mode is to detect a valid
radio transmission and synchronize to it quickly and
efficiently. Because transmissions may start at random,
the decoder enables the receiver for 1 code-word in every
18 code-words looking for preamble or sync word.
By using a buffer containing 32 bits (n bits from the current
scan, 32
n from the previous scan) effectively every
batch bit position can be tested within a continuous
transmission of at least 18 batches. Detection of preamble
causes the device to switch to the ‘preamble receive’
mode, while sync word detection causes the device to
switch to the ‘data receive’ mode.
Fig.4 ACCESS
synchronization algorithm for POCSAG.
handbook, full pagewidth
OFF to ON status
preamble
sync word
sync word
no sync word
sync word
preamble
preamble
sync word
preamble
sync word
no preamble or
sync word
(3 batches)
no preamble or
sync word
(1 batch)
no preamble or
sync word
(1 batch)
no preamble or
sync word
(15 batches)
switch-on
preamble receive
data receive
data fail
fade recovery
carrier off
MLC247
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCD5002AH | Enhanced Pager Decoder for APOC1/POCSAG |
| PCD5002HBD-S | Telecommunication Decoder |
| PCD5002HBD-T | Telecommunication Decoder |
| PCD5003HB-T | Telecommunication Decoder |
| PCD5008HBD-T | Telecommunication Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCD5002AH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Pager Decoder for APOC1/POCSAG |
| PCD5002H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced POCSAG and APOC-1 Paging Decoder |
| PCD5002HBD-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication Decoder |
| PCD5002HBD-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication Decoder |
| PCD5002U/10 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced POCSAG and APOC-1 Paging Decoder |
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