參數(shù)資料
型號: PCADADIO-CS
英文描述: PC(ISA)BUS I/O CARD
中文描述: 電腦(ISA)總線的I / O卡
文件頁數(shù): 7/26頁
文件大?。?/td> 393K
代理商: PCADADIO-CS
Page 7
2192-09061-000-000
J489 PCADADIO
Pointer Values and Register Function
Installing Multiple PCADADIOs
This is just like installing a single PCADADIO, except that each must be installed at a different
address. The base address must be set in 4-byte boundaries.
Pointer
Value
(hex)
Read/Write
Function Register Name
00
00
00
00
00
01
02
02
03
03
04
05
06
07
08
09
0A
0B
0C-7F
80
81
Read Base +1
Read Base +1
Write Base +1
Read Base +2
Read Base +3
Write Base +1
Write Base +2
Write Base +3
Write Base +2
Write Base +3
R/W Base +1
R/W Base +1
R/W Base +1
R/W Base +1
Write Base +1
Write Base +1
R/W Base +1
R/W Base +1
Write Base +1
Read Base +1
Status Flag - ADC
Status Flag - CTC
ADC Start Conversion
ADC Data - Low Byte
ADC Data - High Byte
Multiplexer Channel Select
DACA Register
DACA Register
DACB Register
DACB Register
CTC Counter A
CTC Counter B
CTC Counter C
CTC Counter Control
Word
Clear CTC Ready
Digital I/O Configuration
Digital I/O Group 2
Digital I/O Group 3
Not Used
User LED
Board ID
Data Bit
Function
0
1
4-7
0-7
0-3
4-7
0-7
4-7
0-7
0-7
0-7
0-7
0-7
0-3
0-7
0-7
0
0-7
ADC ready
0 = conversion completed since
last read of ADC Data - High Byte
Counter-Timer ready
0 = OUTB has transitioned
low-high since Clear CTC Ready
last accessed
Writing any data starts conversion
AD0-3 ADC data from last
conversion
AD4-11 ADC data from last
conversion
Multiplexer channel address
0-15 for PCADADIOCS
0-7 for PCADADIOCD
DA0-3 DACA low data
DA4-11 DACA high data
DB0-3 DACB low data
DB4-11 DACB high data
See Intel 8254 data sheet
See Intel 8254 data sheet
See Intel 8254 data sheet
See Intel 8254 data sheet
Writing any data sets Status Flag -
CTC to 1 and clears CTC interrupt
(if enabled)
NBEN0-3
0 = nibble configured as output
1 = nibble configured as input
PL7 Digital I/O Dig0-7
PL7 Digital I/O Dig8-15
Green User LED Control
0 = LED off
1 = LED on
Reads as 2Dh
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