參數資料
| 型號： | PC56F8006VLF |
| 廠商： | Freescale Semiconductor |
| 文件頁數： | 36/106頁 |
| 文件大小： | 0K |
| 描述： | DSP 16BIT 48-LQFP |
| 標準包裝： | 250 |
| 系列： | 56F8xxx |
| 核心處理器： | 56800 |
| 芯體尺寸： | 16-位 |
| 速度： | 32MHz |
| 連通性： | I²C，LIN，SCI，SPI |
| 外圍設備： | LVD，POR，PWM，WDT |
| 輸入/輸出數： | 40 |
| 程序存儲器容量： | 16KB（8K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 1K x 16 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.8 V ~ 3.6 V |
| 數據轉換器： | A/D 24x12b |
| 振蕩器型： | 內部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 托盤 |
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General System Control Information
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 4
Freescale Semiconductor
35
Provides a 3X system clock that operates at three times the system clock to PWM, timer, and SCI modules
Safety shutdown feature is available if the PLL reference clock is lost
Can be driven from an external clock source
The clock generation module provides the programming interface for the PLL, internal relaxation oscillator, and crystal
oscillator. It also provides a postscaler to divide clock frequency down by 1, 2, 4, 8, 16, 32, 64, 128, 256 before feeding to the
SIM. The SIM is responsible for further dividing these frequencies by two, which ensures a 50% duty cycle in the system clock
output. For detail, see the OCCS chapter in the MC56F8006 Peripheral Reference Manual.
6.4.1
Internal Clock Source
An internal relaxation oscillator can supply the reference frequency when an external frequency source or crystal is not used. It
is optimized for accuracy and programmability while providing several power-saving configurations that accommodate
different operating conditions. The internal relaxation oscillator has little temperature and voltage variability. To optimize
power, the internal relaxation oscillator supports a run state (8 MHz), standby state (400 kHz), and a power-down state.
During a boot or reset sequence, the relaxation oscillator is enabled by default (the PRECS bit in the PLLCR word is set to 0).
Application code can then also switch to the external clock source and power down the internal oscillator, if desired. If a
changeover between internal and external clock sources is required at power-on, ensure that the clock source is not switched
until the desired external clock source is enabled and stable.
To compensate for variances in the device manufacturing process, the accuracy of the relaxation oscillator can be incrementally
adjusted to within + 0.078% of 8 MHz by trimming an internal capacitor. Bits 0–9 of the OSCTL (oscillator control) register
allow you to set in an additional offset (trim) to this preset value to increase or decrease capacitance. Each unit added or
subtracted changes the output frequency by about 0.078% of 8 MHz, allowing incremental adjustment until the desired
frequency accuracy is achieved.
The center frequency of the internal oscillator is calibrated at the factory to 8 MHz and the TRIM value is stored in the flash
information block and loaded to the FMOPT1 register at reset. When using the relaxation oscillator, the boot code should read
the FMOPT1 register and set this value as OSCTL TRIM. For further information, see the MC56F8006 Peripheral Reference
Manual.
6.4.2
Crystal Oscillator/Ceramic Resonator
The internal crystal oscillator circuit is designed to interface with a parallel-resonant crystal resonator in the frequency range,
specified for the external crystal, of 32.768 kHz (Typ) or 1–16 MHz. A ceramic resonator can be substituted for the 1–16 MHz
range. When used to supply a source to the internal PLL, the recommended crystal/resonator is in the 4 MHz to 8 MHz
(recommend 8 MHz) range to achieve optimized PLL performance. Oscillator circuits are shown in Figure 10, Figure 11, and
Figure 12. Follow the crystal supplier’s recommendations when selecting a crystal, because crystal parameters determine the
component values required to provide maximum stability and reliable start-up. The load capacitance values used in the
oscillator circuit design should include all stray layout capacitances. The crystal and associated components should be mounted
as near as possible to the EXTAL and XTAL pins to minimize output distortion and start-up stabilization time. When using
low-frequency, low-power mode, the only external component is the crystal itself. In the other oscillator modes, load capacitors
(Cx, Cy) and feedback resistor (RF) are required. In addition, a series resistor (RS) may be used in high-gain modes.
Recommended component values are listed in Table 28.
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相關代理商/技術參數 |
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| PC56F8006VWL | 功能描述:數字信號處理器和控制器 - DSP, DSC 16-BIT DSPHC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| PC56F8023VLC | 制造商:Freescale Semiconductor 功能描述:16 BIT DSPHC - Trays |
| PC56F8025VLD | 制造商:Freescale Semiconductor 功能描述:16-BIT 56F8XXX CISC 32KB FLASH 3.3V 44-PIN LQFP TRAY - Trays |
| PC56F8037VLH | 制造商:Freescale Semiconductor 功能描述: |
| PC56F8245VLD | 制造商:Freescale Semiconductor 功能描述:PC56F8245VLD - Bulk |
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