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參數(shù)資料
| 型號(hào)： | PC33975AR2 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | Multiple Switch Detection Interface with Suppressed Wake-Up and 32mA Wetting Current |
| 中文描述： | 多交換檢測(cè)接口，具有抑制喚醒和32毫安濕電流 |
| 文件頁(yè)數(shù)： | 10/32頁(yè) |
| 文件大?。?/td> | 641K |
| 代理商： | PC33975AR2 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
10
33975
TIMING DIAGRAMS
TIMING DIAGRAMS
Figure 4. SPI Timing Characteristics
Figure 5. Sleep Mode to Normal Mode Operation
Figure 6. Normal Mode Interrupt Operation
t
SO(dis)
0.7
VDD
0.2
VDD
0.2
VDD
0.7
VDD
0.2
VDD
t
lead
t
SO(en)
t
SI(su)
t
SI(hold)
t
valid
t
lag
CS
SCLK
SI
SO
MSB in
MSB out
LSB out
0.7 VDD
0.2
VDD
VPWR
VDD
WAKE
INT
CS
SGn
Power-Up
Normal Mode
Sleep
Command
Sleep Mode
Normal
Mode
Sleep Command
Sleep Mode
Normal
Mode
Sleep Command
Wake-Up From Interrupt
Timer Expire
Wake-Up From
Closed Switch
Tri-State
Command
(Disable Tri-State)
INT
CS
SGn
Switch open “0”
1
SGn Bit in SPI Word
Switch closed “1”
1
0
0
1
Switch
CStatus
0
on falling edge of CS
Latch switch status
Switch state change with
CS
low generates INT
Switch state change with
CS
low generates INT
Rising edge of CS does not
clear
INT
because state change
occurred while CS was low
Switch
CStatus
CSwitch
Switch
CStatus
Switch
CStatus
Switch
CStatus
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