- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367749 > PA28F008S5-85 (INTEL CORP) BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT PDF資料下載
參數(shù)資料
| 型號(hào)： | PA28F008S5-85 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| 中文描述： | 1M X 8 FLASH 5V PROM, 85 ns, PDSO44 |
| 封裝： | 13.30 X 28.20 MM, PLASTIC, SOP-44 |
| 文件頁(yè)數(shù)： | 6/37頁(yè) |
| 文件大?。?/td> | 611K |
| 代理商： | PA28F008S5-85 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)當(dāng)前第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)
BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY
6
PRODUCT PREVIEW
To protect programmed data, each block can be
locked. This block locking mechanism uses a
combination of bits, block lock-bits and a master
lock-bit, to lock and unlock individual blocks. The
block lock-bits gate block erase and program
operations, while the master lock-bit gates block
lock-bit configuration operations. Lock-bit config-
uration operations (Set Block Lock-Bit, Set Master
Lock-Bit, and Clear Block Lock-Bits commands) set
and clear lock-bits.
The status register and RY/BY# output indicate
whether or not the device is busy executing or
ready for a new command. Polling the status
register, system software retrieves WSM feedback.
The RY/BY# output gives an additional indicator of
WSM activity by providing a hardware status signal.
Like the status register, RY/BY#-low indicates that
the WSM is performing a block erase, program, or
lock-bit configuration. RY/BY#-high indicates that
the WSM is ready for a new command, block erase
is suspended (and program is inactive), program is
suspended, or the device is in deep power-down
mode.
The Automatic Power Savings (APS) feature
substantially reduces active current when the
device is in static mode (addresses not switching).
In APS mode, the typical I
CCR
current is 1 mA.
When CE# and RP# pins are at V
CC
, the
component enters a CMOS standby mode. Driving
RP# to GND enables a deep power-down mode
which significantly reduces power consumption,
provides write protection, resets the device, and
clears the status register. A reset time (t
PHQV
) is
required from RP# switching high until outputs are
valid. Likewise, the device has a wake time (t
PHEL
)
from RP#-high until writes to the CUI are
recognized.
1.3
Pinout and Pin Description
The family of devices is available in 40-lead TSOP
(Thin Small Outline Package, 1.2 mm thick) and
44-lead PSOP (Plastic Small Outline Package).
Pinouts are shown in Figures 2 and 3.
4-Mbit: A - A ,
8-Mbit: A - A ,
16-Mbit: A - A
Input
Buffer
Output
Buffer
Identifier
Register
Status
Register
Command
Register
I/O Logic
Data
Comparator
Input
Buffer
Address
Latch
Address
Counter
Y
Decoder
X
Decoder
Y Gating
4-Mbit: Eight
8-Mbit: Sixteen
16-Mbit: Thirty-Two
64-Kbyte Blocks
Write State
Machine
Program/Erase
Voltage Switch
CE#
WE#
OE#
RP#
RY/BY#
V
V
GND
DQ - DQ
PP
V
CC
7
Figure 1. Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PA28F004S5-85 | BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F008S5-120 | BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F016SC-95 | BYTE-WIDE SmartVoltage FlashFile⑩ MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F004SC-120 | BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| PA28F004SC-85 | BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PA28F008SA-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| PA28F008SA85 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intel 功能描述: |
| PA28F008SA-85 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| PA28F008SA-L200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
| PA28F008SA-L250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Flash EEPROM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。