參數(shù)資料
型號(hào): PA28F008S5-85
廠商: INTEL CORP
元件分類: PROM
英文描述: BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
中文描述: 1M X 8 FLASH 5V PROM, 85 ns, PDSO44
封裝: 13.30 X 28.20 MM, PLASTIC, SOP-44
文件頁(yè)數(shù): 12/37頁(yè)
文件大?。?/td> 611K
代理商: PA28F008S5-85
BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY
E
12
PRODUCT PREVIEW
Table 2. Bus Operations
Mode
Notes
RP#
CE#
OE#
WE#
Address
V
PP
DQ
0
–7
RY/BY#
Read
1,2,3
V
IH
or
V
HH
V
IH
or
V
HH
V
IH
or
V
HH
V
IL
V
IH
or
V
HH
V
IH
or
V
HH
V
IL
V
IL
V
IH
X
X
D
OUT
X
Output Disable
3
V
IL
V
IH
V
IH
X
X
High Z
X
Standby
3
V
IH
X
X
X
X
High Z
X
Deep Power-Down
4
X
X
X
X
X
High Z
V
OH
V
OH
Read Identifier Codes
V
IL
V
IL
V
IH
See
Figure 5
X
Note 5
Write
3,6,7
V
IL
V
IH
V
IL
X
X
D
IN
X
NOTES:
1. Refer to DC Characteristics. When V
PP
V
PPLK
, memory contents can be read, but not altered.
2. X can be V
or V
IH
for control and address input pins and V
PPLK
or V
PPH1/2
for V
PP
. See DC Characteristics for V
PPLK
and
V
PPH1/2
voltages.
3. RY/BY# is V
OL
when the WSM is executing internal block erase, program, or lock-bit configuration algorithms. It is V
OH
when the WSM is not busy, in block erase suspend mode (with program inactive), program suspend mode, or deep power-
down mode.
4.
RP# at GND ± 0.2V ensures the lowest deep power-down current.
5. See Section 4.2 for read identifier code data.
6. Command writes involving block erase, program, or lock-bit configuration are reliably executed when V
PP
= V
PPH1/2
and
V
CC
= V
CC1/2
(see Section 6.2 for operating conditions).
7. Refer to Table 3 for valid D
IN
during a write operation.
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