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Chapter 23 1024 KByte Flash Module (S12XFTM1024K5V2)
MC9S12XE-Family Reference Manual Rev. 1.07
Freescale Semiconductor
873
The P-Flash word addressed by ECCRIX = 001 contains the lower 16 bits of the global address. The
following four words addressed by ECCRIX = 010 to 101 contain the 64-bit wide data phrase. The four
data words and the parity byte are the uncorrected data read from the P-Flash block.
The D-Flash word addressed by ECCRIX=001 contains the lower 16 bits of the global address. The
uncorrected 16-bit data word is addressed by ECCRIX=010feature: FECCR, ECC Error Results register.
23.3.2.14 Flash Option Register (FOPT)
The FOPT register is the Flash option register.
All bits in the FOPT register are readable but are not writable.
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0x7F_FF0E located in P-Flash memory (see
Table 23-3
) as indicated
by reset condition F in
Figure 23-22
. If a double bit fault is detected while reading the P-Flash phrase
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
23.3.2.15 Flash Reserved0 Register (FRSV0)
This Flash register is reserved for factory testing.
7
XBUS01
Bus Source Identifier
— The XBUS01 bit determines whether the ECC error was caused by a read access
from the CPU or XGATE.
0 ECC Error happened on the CPU access
1 ECC Error happened on the XGATE access
6–0
GADDR[22:16]
Global Address
— The GADDR[22:16] field contains the upper seven bits of the global address having
caused the error.
Offset Module Base + 0x0010
7
6
5
4
3
2
1
0
R
NV[7:0]
W
Reset
F
F
F
F
F
F
F
F
= Unimplemented or Reserved
Figure 23-22. Flash Option Register (FOPT)
Table 23-28. FOPT Field Descriptions
Field
Description
7–0
NV[7:0]
Nonvolatile Bits
— The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
Table 23-27. FECCR Index=000 Bit Descriptions
Field
Description