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型號(hào)：	P312XDP512F0VAAR
廠商：	飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述：	Covers, S12XD, S12XB & S12XA Families
中文描述：	封面，S12XD，S12XB
文件頁(yè)數(shù)：	716/1350頁(yè)
文件大?。?/td>	3951K
代理商：	P312XDP512F0VAAR

Chapter 19 Debug (S12XDBGV2)

MC9S12XDP512 Data Sheet, Rev. 2.17

Freescale Semiconductor

If the TAG bit is clear (forced type trigger) a comparator match is generated when the selected address

appears on the system address bus. If the selected address is an opcode address, the match is generated

when the opcode is fetched from the memory. This precedes the instruction execution by an indefinite

number of cycles due to instruction pipe lining. For a comparator match of an opcode at an odd address

when TAG = 0, the corresponding even address must be contained in the comparator register. Thus for an

opcode at odd address (n), the comparator register must contain address (n – 1).

Once a successful comparator match has occurred, the condition that caused the original match is not

verified again on subsequent matches. Thus if a particular data value is verified at a given address, this

address may not still contain that data value when a subsequent match occurs.

Comparators C and D can also be used to select an address range to trace from. This is determined by the

TRANGEbitsintheDBGTCRregister.TheTRANGEencodingisshownin

.IftheTRANGE

bits select a range definition using comparator D, then comparator D is configured for trace range

definition and cannot be used for address bus comparisons. Similarly if the TRANGE bits select a range

definition using comparator C, then comparator C is configured for trace range definition and cannot be

used for address bus comparisons.

Match[0,1,2,3] map directly to comparators [A,B,C,D] respectively, except in range modes (see

Section 19.3.1.4, “Debug Control Register2 (DBGC2)”

). Comparator priority rules are described in the

trigger priority (see

Section 19.4.3.6, “Trigger Priorities”

Exact Address Comparator Match (Comparators A and C)

Withrangecomparisonsdisabled,thematchconditionisanexactequivalenceofaddress/databuswiththe

value stored in the comparator address/data registers. Further qualification of the type of access (R/W,

word/byte) is possible.

ComparatorsAandCdonotfeatureSZEorSZcontrolbits,thustheaccesssizeisnotcompared.Theexact

address is compared, thus with the comparator address register loaded with address (n) a misaligned word

accessofaddress(n-1)alsoaccesses(n)butdoesnotcauseamatch

listsaccessconsiderations

without data bus compare.

lists access considerations with data bus comparison. To compare

byte accesses DBGXDH must be loaded with the data byte. The low byte must be masked out using the

DBGXDLM mask register. On word accesses data byte of the lower address is mapped to DBGXDH.

Comparators A and C feature an NDB control bit to determine if a match occurs when the data bus differs

to comparator register contents or when the data bus is equivalent to the comparator register contents.

Table 19-36. Comparator A and C Data Bus Considerations

Example Valid Match

MOVW #$WORD ADDR[n]

MOVB #$BYTE ADDR[n]

MOVW #$WORD ADDR[n]

相關(guān)PDF資料	PDF描述
P312XDP512F0VAG	Covers, S12XD, S12XB & S12XA Families
P312XDP512F0VAGR	Covers, S12XD, S12XB & S12XA Families
P312XDP512F0VAL	Covers, S12XD, S12XB & S12XA Families
P312XDP512F0VALR	Covers, S12XD, S12XB & S12XA Families
P312XDP512F0VFU	Covers, S12XD, S12XB & S12XA Families

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
P312XDP512J1VAAR	制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCS12X Microcontrollers
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P3130	制造商:Switchcraft 功能描述:
P31-300	制造商:SEMIKRON 制造商全稱:Semikron International 功能描述:For stud devices
P313-001	制造商:Tripp Lite 功能描述:MINI STEREO DUBBING CORD Y ADAPTER 3.5MM M TO (2) 3.5MM F - - Bulk

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