參數(shù)資料
型號(hào)： OR3C804BA352-DB
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
英文描述： FPGA, 484 CLBS, 116000 GATES, PBGA352
封裝： PLASTIC, BGA-352
文件頁(yè)數(shù)： 189/203頁(yè)
文件大?。?/td> 1368K
代理商： OR3C804BA352-DB
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86
Lattice Semiconductor
Data Sheet
November 2006
ORCA Series 3C and 3T FPGAs
FPGA States of Operation (continued)
Note: F = nished, no more CLKs required.
5-2761(F)
Figure 51. Start-Up Waveforms
Reconguration
To recongure the FPGA when the device is operating
in the system, a low pulse is input into PRGM. The con-
guration data in the FPGA is cleared, and the I/Os not
used for conguration are 3-stated. The FPGA then
samples the mode select inputs and begins recongu-
ration. When reconguration is complete, DONE is
released, allowing it to be pulled high.
Partial Reconguration
All
ORCA device families have been designed to allow
a partial reconguration of the FPGA at any time. This
is done by setting a bit stream option in the previous
conguration sequence that tells the FPGA to not reset
all of the conguration RAM during a reconguration.
Then only the conguration frames that are to be modi-
ed need to be rewritten, thereby reducing the congu-
ration time.
Other bit stream options are also available that allow
one portion of the FPGA to remain in operation while a
partial reconguration is being done. If this is done, the
user must be careful to not cause contention between
the two congurations (the bit stream resident in the
FPGA and the partial reconguration bit stream) as the
second reconguration bit stream is being loaded.
Other Conguration Options
There are many other conguration options available to
the user that can be set during bit stream generation in
ispLEVER. These include options to enable boundary
scan and/or the microprocessor interface (MPI) and/or
the programmable clock manager (PCM), readback
options, and options to control and use the internal
oscillator after conguration.
Other useful options that affect the next conguration
(not the current conguration process) include options
to disable the global set/reset during conguration, dis-
able the 3-state of I/Os during conguration, and dis-
able the reset of internal RAMs during conguration to
allow for partial congurations (see above). For more
information on how to set these and other conguration
options, please see the ispLEVER documentation.
Di
C1
C2
C3
C4
F
C1
C2
C3
C4
C1
C2
C3
C4
C1, C2, C3, OR C4
Di + 1
Di
Di + 2
Di + 3
Di + 4
Di + 1
Di
Di + 2
Di + 3
Di + 4
CCLK_SYNC
DONE IN
U1
U2
U3
U4
F
U1
U2
U3
U4
U1
U2
U3
U4
UCLK_NOSYNC
Di + 1
Di
Di + 2
Di + 3
Di + 4
Di + 1
Di + 2
Di + 3
UCLK_SYNC
UCLK PERIOD
SYNCHRONIZATION UNCERTAINTY
DONE IN
F
C1
U1, U2, U3, OR U4
DONE
I/O
GSRN
ACTIVE
DONE
I/O
GSRN
ACTIVE
DONE
I/O
GSRN
ACTIVE
DONE
I/O
GSRN
ACTIVE
UCLK
F
CCLK_NOSYNC
Select
devices
have
been
discontinued.
See
Ordering
Information
section
for
product
status.
相關(guān)PDF資料
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