參數(shù)資料
型號(hào)： OPA685U
元件分類： 運(yùn)動(dòng)控制電子
英文描述： Ultra-Wideband, Current-Feedback OPERATIONAL AMPLIFIER With Disable TM
中文描述： 超寬帶，電流反饋運(yùn)算放大器商標(biāo)使用禁用
文件頁(yè)數(shù)： 14/28頁(yè)
文件大?。?/td> 283K
代理商： OPA685U
14
OPA685
Figure 3 shows the AC–coupled, single +5V supply, gain of
+8V/V circuit configuration used as the basis for the +5V
only Specifications and Typical Performance Curves. The
key requirement of broadband single-supply operation is
maintaining input and output signal swings within the speci-
fied useable voltage ranges. The circuit in Figure 3 estab-
lishes an input midpoint bias using a simple resistive divider
from the +5V supply (two 806
resistors) to the non-
inverting input. The input signal is then AC-coupled into this
midpoint voltage bias. The input voltage can swing to within
1.7V of either supply pin, giving a 1.4Vp-p input signal
range centered around the +5V supply midpoint. The input
impedance matching resistor (57.6
) used in Figure 3 is
adjusted to give a 50
input match when the parallel
combination of the biasing divider network is included. The
gain resistor (R
G
) is AC-coupled, giving the circuit a DC
gain of +1, which puts the input DC bias voltage (2.5V) at
the output as well. The feedback resistor value has been
adjusted from the bipolar supply condition to re-optimize for
a flat frequency response in +5V only, gain of +8, operation
(see Setting Resistor Values to Optimize Bandwidth section
of this data sheet). On a single +5V supply, the output
voltage can swing to within 1.4V of either supply pin while
delivering more than 70mA output current, giving a 2.2V
output swing into 100
(5dBm maximum at the matched
load). The circuit of Figure 3 shows a blocking capacitor
driving into a 50
output resistor, then into a 50
load.
Alternatively, the blocking capacitor could be removed if
the load is tied to a supply midpoint, or to ground if the DC
current required by the load is acceptable.
Figure 4 shows the AC-coupled, single +5V supply, gain of
–8V/V circuit configuration used as the basis for the +5V
only Typical Performance Curves. In this case, the midpoint
DC bias on the non-inverting input is also decoupled with an
additional 0.1
μ
F decoupling capacitor. This reduces the
source impedance at higher frequencies for the non-invert-
ing input bias current noise. This 2.5V bias on the non-
inverting input pin also appears on the inverting input pin
and, since R
G
is DC-blocked by the input capacitor, will also
appear at the output pin. One advantage to inverting opera-
tion is that since there is no signal swing across the input
stage, higher slew rates and operation at even lower supply
voltages is possible. To retain a 1Vp-p output capability,
operation down to a +3V supply is allowed. At a +3V
supply, the input common-mode range is 0V, but for the
inverting configuration of a current feedback amplifier,
wideband operation is retained even with the input stage
saturated. The circuit in Figure 4 can be operated down to a
3V supply with > 200MHz, 1Vp-p output.
FIGURE 3. AC-Coupled, G = +8V/V, Single-Supply Specifications and Test Circuit.
FIGURE 4. AC-Coupled, G = –8V/V, Single-Supply Specifications and Test Circuit.
OPA685
+5V
+V
S
DIS
50
Load
50
R
G
50
806
806
57.6
0.1
μ
F
+
6.8
μ
F
0.1
μ
F
0.1
μ
F
0.1
μ
F
V
I
V
O
50
Source
R
F
348
OPA685
+5V
+V
S
DIS
50
Load
50
R
G
50
806
806
20
0.1
μ
F
0.1
μ
F
0.1
μ
F
V
O
V
I
R
F
400
+
6.8
μ
F
0.1
μ
F
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