參數(shù)資料
型號(hào): OPA685U
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Ultra-Wideband, Current-Feedback OPERATIONAL AMPLIFIER With Disable TM
中文描述: 超寬帶,電流反饋運(yùn)算放大器商標(biāo)使用禁用
文件頁(yè)數(shù): 13/28頁(yè)
文件大?。?/td> 283K
代理商: OPA685U
13
OPA685
APPLICATIONS INFORMATION
WIDEBAND CURRENT-FEEDBACK OPERATION
The OPA685 gives a new level of performance in wideband
current-feedback op amps. Nearly constant AC performance
over a wide gain range, along with 4200V/
μ
s slew rate,
offers a lower power, lower cost solution for high intercept
IF amplifier requirements. While optimized at a gain of 8V/
V (12dB to a matched 50
load) to give 400MHz band-
width, application from gains of 1 to 100 can be supported.
As a video line driver (gain of +2), the bandwidth extends to
900MHz, with a slew rate to support the highest pixel rates.
At gains above 20, the signal bandwidth starts to decrease
but still exceeds 50MHz up to a gain of 80V/V (32dB to a
matched 50
load). Single +5V supply operation is also
supported with similar bandwidths, but reduced output power
capability. For lower speed (< 250MHz) requirements at
higher output power, consider the OPA681.
Figure 1 shows the DC-coupled, gain of +8V/V, dual power
supply circuit used as the basis of the
±
5V Specifications
and Typical Performance Curves. For test purposes, the
input impedance is set to 50
with a resistor to ground and
the output impedance is set to 50
with a series output
resistor. Voltage swings reported in the specifications are
taken directly at the input and output pins, while load power
(dBm) is defined at a matched 50
load. For the circuit of
Figure 1, the total effective load will be 100
|| 458
= 82
.
The disable control line (DIS) is typically left open to
guarantee normal amplifier operation. One optional compo-
nent is included in Figure 1. In addition to the usual power
supply de-coupling capacitors to ground, a 0.1
μ
F capacitor
is included between the two power supply pins. In practical
PC board layouts, this optional capacitor will typically
improve the 2nd harmonic distortion performance by 3dB to
6dB for bipolar supply operation.
Figure 2 shows the DC-coupled, gain of –8V/V, dual power
supply circuit used as the basis of the Inverting Typical
Performance Curves. Inverting operation offers several per-
formance benefits. Since there is no common-mode signal
across the input stage, the slew rate for inverting operation
is higher and the distortion performance is slightly im-
proved. An additional input resistor, R
T
, is included in
Figure 2 to set the input impedance equal to 50
. The
parallel combination of R
T
and R
G
set the input impedance.
Both the non-inverting and inverting applications of Figures
1 and 2 will benefit from optimizing the feedback resistor
value for bandwidth (see the discussion in Setting Resistor
Values to Optimize Bandwidth). As the gain increases for
the inverting configuration, a point will be reached where
R
G
will equal 50
; R
T
is removed with the input match set
by R
G
only. With R
G
fixed to achieve an input match of
50
, to increase gain, R
F
is simply increased to get higher
gain. This will, however, quickly reduce the achievable
bandwidth as shown by the inverting gain of –16 frequency
response in the Typical Performance Curves. For gains >
12V/V (15.5dB at the matched load), non-inverting opera-
tion will give a higher bandwidth.
FIGURE 1. DC-Coupled, G = +8V/V, Bipolar Supply
Specifications and Test Circuit.
FIGURE 2. DC-Coupled, G = –8V/V, Bipolar Supply
Specifications and Test Circuit.
OPA685
+5V
DIS
–5V
50
Load
50
50
V
I
50
Source
R
G
56.2
R
F
402
+
6.8
μ
F
0.1
μ
F
+
6.8
μ
F
0.1
μ
F
0.1
μ
F
OPA685
+5V
+V
S
–V
S
DIS
–5V
50
Load
50
20
R
T
562
R
G
54.9
+
6.8
μ
F
0.1
μ
F
+
6.8
μ
F
0.1
μ
F
0.1
μ
F
V
I
50
Source
R
F
442
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